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ffb60287b9Merge pull request #24 from tensor4all/chore/remove-obsolete-suite-1793105282 tlinalg-rs 88a2ffeea4c5
Removed in this commit: 22 page(s).
tlinalg-competition (4)
tlinalg-scaling (2)
44a37fd26dpublish: refresh the recorded pages tlinalg-rs 88a2ffeea4c5
New or changed (3)
tlinalg-competition (2)
tlinalg-scaling (1)
tlinalg-competition (2)
tlinalg-kernels (22)
tlinalg-scaling (1)
89efef08a8record: verify the small shapes, time all four (#28) tlinalg-rs 4dcd35f080a6
New or changed (1)
tlinalg-competition (1)
tlinalg-competition (1)
tlinalg-kernels (22)
tlinalg-scaling (1)
5009ea0e5asite: the verdict's subject is the table's first row tlinalg-rs 4dcd35f080a6
New or changed (3)
tlinalg-competition (2)
tlinalg-scaling (1)
tlinalg-kernels (22)
3ec7b11e88record the OpenBLAS competition arm: both vendor arms are current again tlinalg-rs 4dcd35f080a6
New or changed (1)
tlinalg-competition (1)
tlinalg-competition (1)
tlinalg-kernels (22)
tlinalg-scaling (1)
817b3e8e11record the competition arm on the eight cores it declares: 1,584 rows tlinalg-rs 4dcd35f080a6
New or changed (1)
tlinalg-competition (1)
tlinalg-kernels (22)
tlinalg-scaling (1)
2f14740facdata: withdraw the competition run made on one core tlinalg-rs 4dcd35f080a6
Removed in this commit: 1 page(s).
tlinalg-kernels (22)
tlinalg-scaling (1)
43ed2da64frecord the scaling suite and print both tables under tlinalg's names tlinalg-rs 4dcd35f080a6
New or changed (2)
tlinalg-competition (1)
tlinalg-scaling (1)
tlinalg-kernels (22)
5bca839acerecord the competition suite on the MKL arm: 1,584 rows, full coverage tlinalg-rs 4dcd35f080a6
New or changed (1)
tlinalg-competition (1)
tlinalg-kernels (22)
1eefc232f4record tlinalg at 4dcd35f: OpenBLAS arm, 5,004 rows, full coverage tlinalg-rs 4dcd35f080a6
New or changed (1)
tlinalg-kernels (1)
tlinalg-kernels (21)
4d13938002record tlinalg at 4dcd35f: MKL arm, 5,004 rows, full coverage tlinalg-rs 4dcd35f080a6
New or changed (1)
tlinalg-kernels (1)
tlinalg-kernels (20)
7e37f82040Merge pull request #15 from tensor4all/trim/suite-small-batch-canaries tlinalg-rs 06466b166453
New or changed (2)
tlinalg-kernels (2)
tlinalg-kernels (18)
26c5606d28Merge pull request #13 from tensor4all/migrate/v2-on-current-main tlinalg-rs 06466b166453
New or changed (2)
tlinalg-kernels (2)
tlinalg-kernels (18)
e51fef6e93Merge pull request #9 from tensor4all/record-region-floor tlinalg-rs e6ee2d3304e0
New or changed (2)
tlinalg-kernels (2)
tlinalg-kernels (16)
452df39d7eMerge pull request #7 from tensor4all/record-upgrade-row-split tlinalg-rs e6ee2d3304e0
New or changed (2)
tlinalg-kernels (2)
tlinalg-kernels (14)
3e6ac30e0aMerge pull request #6 from tensor4all/record-row-split-gate tlinalg-rs 6180fb0da697
New or changed (2)
tlinalg-kernels (2)
tlinalg-kernels (12)
27a223546fMerge pull request #5 from tensor4all/record-threaded-rank-one tlinalg-rs 5cb243038a5b
New or changed (2)
tlinalg-kernels (2)
tlinalg-kernels (10)
119cfd2289Merge pull request #3 from tensor4all/record-householder-blocked tlinalg-rs 6a873e6168e5
New or changed (2)
tlinalg-kernels (2)
tlinalg-kernels (8)
8c55247e04Merge pull request #2 from tensor4all/refix-recording tlinalg-rs 9e0796cacb99
New or changed (2)
tlinalg-kernels (2)
tlinalg-kernels (6)
73b4f7df95Merge pull request #1 from tensor4all/mkl-vendor-arm tlinalg-rs 7dbed2f0a8fc
New or changed (6)
tlinalg-kernels (6)
Removed in this commit: 2 page(s).
0da7fc4377Record the first before/after pair, and what it does and does not establish tlinalg-rs 8276e097c214
New or changed (1)
tlinalg-kernels (1)
b6e1fab7b9Record the first cell: zen5-cpu, small regime, 1T and 8T, at 6d55cb6 tlinalg-rs 6d55cb6f68bd
New or changed (1)
tlinalg-kernels (1)