CPU Public API Benchmark Results

Latest run: PUBLICATION_GATE_PROFILE=full ./scripts/run_cpu_public_api.sh 1 4.

This file is generated from sequential CPU public API runs under data/results/amd-cpu/cpu/public_api/20261008_060822.

CPU Information

Thread Environments

Threads: 1

Threads: 4

Timing Discipline

Threads: 1 4

CPU Benchmark Items

Median ± IQR (ms). Missing backends are shown as -.

suite benchmark dtype threads shape tenferro-rs direct API (ms) tenferro-rs eager mode (ms) tenferro-rs trace mode (ms) PyTorch Python (ms) JAX Python (XLA CPU) (ms) Julia (Base/LinearAlgebra) (ms) Julia (Strided.jl) (ms)
cpu/complex cholesky c64 1 448x448 5.258 ± 0.054 - 5.406 ± 0.149 6.106 ± 0.016 3.539 ± 0.027 3.411 ± 1.188 -
cpu/complex cholesky c64 4 448x448 1.597 ± 0.012 - 2.292 ± 0.778 1.703 ± 0.008 1.725 ± 0.426 1.590 ± 0.081 -
cpu/complex conj c64 1 16777216 66.091 ± 1.641 - 62.737 ± 1.687 62.450 ± 0.527 68.871 ± 0.921 69.137 ± 1.120 80.349 ± 0.522
cpu/complex conj c64 4 16777216 22.182 ± 1.078 - 21.635 ± 0.411 22.321 ± 1.470 22.827 ± 0.659 70.784 ± 1.105 35.758 ± 1.918
cpu/complex div c64 1 8388608 72.576 ± 0.851 - 80.824 ± 2.123 66.166 ± 0.246 65.176 ± 0.444 89.289 ± 1.144 98.678 ± 1.009
cpu/complex div c64 4 8388608 19.568 ± 0.599 - 19.539 ± 0.155 17.536 ± 0.164 18.832 ± 0.565 85.164 ± 0.715 30.322 ± 0.459
cpu/complex dot_general c64 1 640x640 62.156 ± 0.108 - 62.968 ± 0.145 61.492 ± 0.139 75.858 ± 0.110 35.182 ± 1.109 -
cpu/complex dot_general c64 4 640x640 21.376 ± 0.531 - 22.444 ± 0.735 20.940 ± 0.069 19.191 ± 0.131 9.372 ± 0.406 -
cpu/complex dot_general_with_conj c64 1 640x640 63.209 ± 0.239 - unsupported 61.860 ± 0.138 79.891 ± 0.523 35.806 ± 0.238 -
cpu/complex dot_general_with_conj c64 4 640x640 22.386 ± 0.639 - unsupported 21.103 ± 0.045 19.950 ± 0.682 9.618 ± 0.424 -
cpu/complex eig c64 1 112x112 12.358 ± 0.029 - 12.413 ± 0.032 12.635 ± 0.013 12.773 ± 0.045 14.882 ± 0.066 -
cpu/complex eig c64 4 112x112 11.063 ± 1.620 - 12.881 ± 1.525 10.664 ± 0.017 12.851 ± 0.058 15.095 ± 0.027 -
cpu/complex exp c64 1 4194304 99.907 ± 0.609 - 100.316 ± 0.518 101.184 ± 0.149 82.827 ± 0.204 62.131 ± 0.720 65.585 ± 1.190
cpu/complex exp c64 4 4194304 25.611 ± 0.702 - 25.348 ± 0.654 25.919 ± 0.102 22.466 ± 0.393 62.216 ± 0.700 20.509 ± 4.120
cpu/complex log c64 1 4194304 125.634 ± 1.103 - 123.417 ± 0.543 134.408 ± 0.377 156.688 ± 0.152 116.317 ± 0.499 121.566 ± 0.267
cpu/complex log c64 4 4194304 30.789 ± 0.317 - 31.409 ± 0.247 34.111 ± 0.127 40.410 ± 0.367 116.212 ± 1.187 33.982 ± 1.084
cpu/complex mul c64 1 8388608 39.546 ± 0.208 - 41.130 ± 1.742 36.328 ± 0.555 38.129 ± 0.398 38.574 ± 0.309 45.264 ± 0.407
cpu/complex mul c64 4 8388608 14.638 ± 0.570 - 14.383 ± 0.174 13.124 ± 0.222 14.117 ± 0.588 38.681 ± 0.105 21.239 ± 0.948
cpu/complex norm_fro c64 1 2048x1536 34.277 ± 0.634 - 19.713 ± 0.065 19.861 ± 0.045 9.377 ± 0.079 5.024 ± 0.010 -
cpu/complex norm_fro c64 4 2048x1536 20.945 ± 1.059 - 5.524 ± 0.545 4.966 ± 0.032 1.845 ± 0.301 5.031 ± 0.016 -
cpu/complex qr c64 1 256x256 9.640 ± 0.054 - 9.728 ± 0.015 11.036 ± 0.025 6.989 ± 0.042 8.480 ± 0.057 -
cpu/complex qr c64 4 256x256 3.933 ± 0.120 - 5.102 ± 0.583 4.268 ± 0.012 5.450 ± 0.512 5.380 ± 0.061 -
cpu/complex solve c64 1 384x384,rhs=8 6.665 ± 0.020 - 6.742 ± 0.038 6.551 ± 0.017 4.347 ± 0.020 4.056 ± 0.050 -
cpu/complex solve c64 4 384x384,rhs=8 2.405 ± 0.198 - 3.329 ± 0.280 2.148 ± 0.031 2.243 ± 0.451 1.887 ± 0.037 -
cpu/complex svd c64 1 160x160 7.121 ± 0.020 - 7.203 ± 0.038 8.550 ± 0.022 5.138 ± 0.045 5.054 ± 0.054 -
cpu/complex svd c64 4 160x160 3.904 ± 0.038 - 3.995 ± 1.549 3.888 ± 0.022 4.016 ± 0.498 3.820 ± 0.075 -
cpu/complex tensordot c64 1 640x640 62.086 ± 0.187 - 62.649 ± 0.135 61.537 ± 0.108 75.639 ± 0.065 35.073 ± 0.044 -
cpu/complex tensordot c64 4 640x640 21.324 ± 0.126 - 22.638 ± 0.516 20.939 ± 0.040 19.281 ± 0.260 8.997 ± 0.061 -
cpu/einsum_concrete einsum_ij_jk_ik f64 1 1024x1024 57.603 ± 0.317 - unsupported 59.481 ± 0.248 59.236 ± 0.133 - -
cpu/einsum_concrete einsum_ij_jk_ik f64 4 1024x1024 14.858 ± 0.092 - unsupported 16.445 ± 0.038 14.990 ± 0.210 - -
cpu/elementwise_reduction abs f64 1 33554432 60.436 ± 0.298 - 60.341 ± 0.356 60.905 ± 0.778 66.336 ± 2.900 70.816 ± 0.750 112.315 ± 0.281
cpu/elementwise_reduction abs f64 4 33554432 21.523 ± 0.179 - 21.219 ± 0.370 21.113 ± 0.221 22.981 ± 0.177 66.159 ± 1.567 42.804 ± 2.096
cpu/elementwise_reduction add f64 1 33554432 71.358 ± 0.513 - 69.408 ± 0.915 71.844 ± 1.115 77.741 ± 3.247 73.602 ± 0.564 131.389 ± 0.678
cpu/elementwise_reduction add f64 4 33554432 27.253 ± 0.573 - 26.313 ± 0.360 26.954 ± 0.442 28.081 ± 0.309 73.116 ± 0.669 46.384 ± 2.450
cpu/elementwise_reduction chain_log1p_exp_mul f64 1 4194304 83.530 ± 2.597 - 190.613 ± 13.842 42.460 ± 0.372 44.019 ± 0.265 65.745 ± 3.973 71.530 ± 0.546
cpu/elementwise_reduction chain_log1p_exp_mul f64 4 4194304 24.706 ± 1.541 - 50.033 ± 3.175 14.930 ± 0.248 11.531 ± 0.403 65.297 ± 0.354 18.220 ± 4.550
cpu/elementwise_reduction clamp f64 1 8388608 23.205 ± 0.782 - 22.863 ± 0.259 20.463 ± 0.198 22.823 ± 0.451 20.892 ± 3.765 34.359 ± 5.532
cpu/elementwise_reduction clamp f64 4 8388608 8.326 ± 0.246 - 8.337 ± 0.425 8.003 ± 0.075 8.523 ± 0.261 17.752 ± 4.236 10.671 ± 4.834
cpu/elementwise_reduction compare_lt f64 1 33554432 22.899 ± 0.200 - 22.119 ± 0.500 30.011 ± 0.344 24.802 ± 0.871 14.188 ± 0.060 -
cpu/elementwise_reduction compare_lt f64 4 33554432 13.050 ± 0.091 - 13.020 ± 0.309 13.453 ± 0.143 13.138 ± 0.114 14.053 ± 0.124 -
cpu/elementwise_reduction cos f64 1 8388608 117.353 ± 0.699 - 117.898 ± 0.413 47.227 ± 0.161 117.973 ± 0.223 56.662 ± 5.910 62.443 ± 7.189
cpu/elementwise_reduction cos f64 4 8388608 29.579 ± 0.148 - 29.664 ± 0.243 12.672 ± 0.166 30.583 ± 0.366 56.825 ± 4.106 16.114 ± 5.058
cpu/elementwise_reduction div f64 1 33554432 71.036 ± 0.785 - 70.273 ± 1.020 71.517 ± 0.298 77.547 ± 2.356 76.291 ± 4.910 131.674 ± 0.746
cpu/elementwise_reduction div f64 4 33554432 26.798 ± 0.292 - 26.370 ± 0.326 26.711 ± 0.315 27.505 ± 0.193 73.144 ± 0.580 49.796 ± 0.613
cpu/elementwise_reduction exp f64 1 8388608 50.544 ± 0.419 - 49.948 ± 0.768 32.418 ± 0.312 21.534 ± 0.283 47.062 ± 5.397 50.563 ± 5.519
cpu/elementwise_reduction exp f64 4 8388608 13.245 ± 0.168 - 14.066 ± 0.513 9.238 ± 0.244 6.830 ± 0.284 46.567 ± 4.534 16.553 ± 4.919
cpu/elementwise_reduction expm1 f64 1 4194304 31.030 ± 0.269 - 31.083 ± 0.320 16.041 ± 0.183 13.905 ± 0.160 29.112 ± 4.436 32.516 ± 4.511
cpu/elementwise_reduction expm1 f64 4 4194304 7.905 ± 0.238 - 8.409 ± 0.282 4.357 ± 0.112 4.489 ± 0.234 28.983 ± 0.280 8.519 ± 5.247
cpu/elementwise_reduction log f64 1 8388608 47.820 ± 0.593 - 49.081 ± 0.709 39.581 ± 0.140 49.853 ± 0.335 59.916 ± 4.378 64.767 ± 3.292
cpu/elementwise_reduction log f64 4 8388608 13.065 ± 0.316 - 12.406 ± 0.482 10.392 ± 0.089 12.904 ± 0.312 59.095 ± 4.326 17.139 ± 7.334
cpu/elementwise_reduction log1p f64 1 4194304 40.605 ± 0.204 - 41.462 ± 0.595 15.718 ± 0.231 26.175 ± 0.038 35.001 ± 3.950 39.398 ± 4.072
cpu/elementwise_reduction log1p f64 4 4194304 10.529 ± 0.468 - 10.342 ± 0.427 4.331 ± 0.098 7.140 ± 0.215 34.637 ± 0.457 10.034 ± 5.037
cpu/elementwise_reduction maximum f64 1 33554432 72.193 ± 0.373 - 70.830 ± 0.535 70.635 ± 0.794 75.985 ± 2.589 80.731 ± 3.941 137.353 ± 0.363
cpu/elementwise_reduction maximum f64 4 33554432 27.041 ± 0.208 - 25.913 ± 0.211 26.434 ± 0.129 27.865 ± 0.167 77.780 ± 1.264 50.951 ± 0.479
cpu/elementwise_reduction minimum f64 1 33554432 72.301 ± 0.423 - 71.318 ± 0.299 71.625 ± 0.779 75.028 ± 0.851 79.985 ± 3.918 136.204 ± 0.391
cpu/elementwise_reduction minimum f64 4 33554432 26.717 ± 0.224 - 26.153 ± 0.885 26.428 ± 0.109 27.758 ± 0.468 77.426 ± 1.301 50.522 ± 0.818
cpu/elementwise_reduction mul f64 1 33554432 72.953 ± 0.815 - 70.965 ± 0.404 70.630 ± 1.024 78.390 ± 3.450 75.674 ± 3.285 131.630 ± 0.546
cpu/elementwise_reduction mul f64 4 33554432 27.040 ± 0.362 - 26.297 ± 0.400 26.774 ± 0.184 28.523 ± 0.420 72.764 ± 0.680 48.013 ± 2.402
cpu/elementwise_reduction neg f64 1 33554432 61.576 ± 0.412 - 60.094 ± 0.503 62.056 ± 0.909 66.761 ± 2.925 67.383 ± 2.946 114.803 ± 3.134
cpu/elementwise_reduction neg f64 4 33554432 21.727 ± 0.323 - 21.236 ± 0.364 20.969 ± 1.478 23.101 ± 0.113 66.872 ± 0.655 40.553 ± 2.210
cpu/elementwise_reduction pow f64 1 4194304 65.146 ± 0.450 - 65.632 ± 0.354 31.702 ± 0.261 65.592 ± 0.146 147.519 ± 4.140 102.734 ± 4.679
cpu/elementwise_reduction pow f64 4 4194304 16.447 ± 0.234 - 16.448 ± 0.177 8.171 ± 0.082 17.149 ± 0.211 148.399 ± 1.922 26.487 ± 5.190
cpu/elementwise_reduction reduce_max_all f64 1 8192x4096 18.399 ± 0.025 - 18.409 ± 0.059 14.944 ± 0.020 79.254 ± 0.123 12.218 ± 0.219 -
cpu/elementwise_reduction reduce_max_all f64 4 8192x4096 5.348 ± 0.047 - 5.466 ± 0.242 5.031 ± 0.079 20.344 ± 0.539 11.275 ± 0.486 -
cpu/elementwise_reduction reduce_max_axis0 f64 1 2048x2048 2.347 ± 0.024 - 2.358 ± 0.013 35.691 ± 0.105 1.946 ± 0.047 1.289 ± 0.057 -
cpu/elementwise_reduction reduce_max_axis0 f64 4 2048x2048 0.622 ± 0.041 - 0.625 ± 0.033 9.011 ± 0.024 0.550 ± 0.029 1.334 ± 0.019 -
cpu/elementwise_reduction reduce_max_axis1 f64 1 2048x2048 2.101 ± 0.029 - 2.174 ± 0.166 3.435 ± 0.007 5.176 ± 0.031 0.582 ± 0.047 -
cpu/elementwise_reduction reduce_max_axis1 f64 4 2048x2048 0.538 ± 0.023 - 0.598 ± 0.052 0.892 ± 0.028 1.463 ± 0.473 0.602 ± 0.043 -
cpu/elementwise_reduction reduce_min_all f64 1 8192x4096 16.425 ± 0.020 - 16.486 ± 0.081 14.962 ± 0.055 79.233 ± 0.065 12.178 ± 0.108 -
cpu/elementwise_reduction reduce_min_all f64 4 8192x4096 5.358 ± 0.072 - 5.532 ± 0.157 5.015 ± 0.078 20.488 ± 0.641 12.917 ± 0.093 -
cpu/elementwise_reduction reduce_min_axis0 f64 1 2048x2048 2.134 ± 0.016 - 2.183 ± 0.020 34.978 ± 0.114 1.917 ± 0.331 1.278 ± 0.064 -
cpu/elementwise_reduction reduce_min_axis0 f64 4 2048x2048 0.553 ± 0.010 - 0.567 ± 0.141 8.851 ± 0.039 0.571 ± 0.065 1.273 ± 0.032 -
cpu/elementwise_reduction reduce_min_axis1 f64 1 4096x4096 8.406 ± 0.087 - 8.374 ± 0.135 13.609 ± 0.081 20.500 ± 0.153 4.641 ± 0.072 -
cpu/elementwise_reduction reduce_min_axis1 f64 4 4096x4096 2.935 ± 0.111 - 2.735 ± 0.143 3.500 ± 0.043 5.428 ± 0.400 4.631 ± 0.051 -
cpu/elementwise_reduction reduce_prod_all f64 1 8192x4096 6.047 ± 0.065 - 5.833 ± 0.070 5.756 ± 0.105 37.806 ± 0.095 7.678 ± 0.090 -
cpu/elementwise_reduction reduce_prod_all f64 4 8192x4096 5.125 ± 0.146 - 5.039 ± 0.183 5.052 ± 0.087 9.740 ± 0.499 7.549 ± 0.071 -
cpu/elementwise_reduction reduce_prod_axis0 f64 1 2048x2048 0.716 ± 0.133 - 0.625 ± 0.031 2.386 ± 0.076 1.564 ± 0.064 0.640 ± 0.052 -
cpu/elementwise_reduction reduce_prod_axis0 f64 4 2048x2048 0.255 ± 0.036 - 0.228 ± 0.042 0.610 ± 0.078 0.501 ± 0.190 0.719 ± 0.055 -
cpu/elementwise_reduction reduce_prod_axis1 f64 1 2048x2048 0.978 ± 0.036 - 0.999 ± 0.226 0.561 ± 0.015 1.414 ± 0.011 0.611 ± 0.024 -
cpu/elementwise_reduction reduce_prod_axis1 f64 4 2048x2048 0.334 ± 0.022 - 0.350 ± 0.063 0.190 ± 0.008 0.383 ± 0.019 0.640 ± 0.041 -
cpu/elementwise_reduction reduce_sum_all f64 1 8192x4096 6.208 ± 0.068 - 6.072 ± 0.200 6.050 ± 0.095 25.513 ± 0.084 7.520 ± 0.192 -
cpu/elementwise_reduction reduce_sum_all f64 4 8192x4096 5.022 ± 0.546 - 4.942 ± 0.455 5.034 ± 0.079 7.125 ± 0.197 7.729 ± 0.523 -
cpu/elementwise_reduction reduce_sum_axis0 f64 1 2048x2048 0.730 ± 0.111 - 0.611 ± 0.136 2.284 ± 0.015 1.613 ± 0.062 0.624 ± 0.067 -
cpu/elementwise_reduction reduce_sum_axis0 f64 4 2048x2048 0.210 ± 0.017 - 0.230 ± 0.054 0.609 ± 0.012 0.497 ± 0.032 0.664 ± 0.027 -
cpu/elementwise_reduction reduce_sum_axis1 f64 1 2048x2048 0.986 ± 0.013 - 1.056 ± 0.144 0.564 ± 0.008 1.262 ± 0.018 0.607 ± 0.093 -
cpu/elementwise_reduction reduce_sum_axis1 f64 4 2048x2048 0.272 ± 0.058 - 0.317 ± 0.110 0.185 ± 0.009 0.360 ± 0.132 0.601 ± 0.031 -
cpu/elementwise_reduction rem f64 1 8388608 56.896 ± 6.456 - 56.250 ± 6.533 43.568 ± 0.325 55.819 ± 0.557 55.530 ± 2.942 67.628 ± 3.787
cpu/elementwise_reduction rem f64 4 8388608 14.832 ± 0.480 - 15.590 ± 0.605 11.955 ± 0.097 16.690 ± 0.545 55.747 ± 4.265 17.394 ± 4.412
cpu/elementwise_reduction rsqrt f64 1 33554432 93.040 ± 0.536 - 90.340 ± 2.289 95.617 ± 1.078 148.550 ± 1.543 210.185 ± 0.409 213.326 ± 2.565
cpu/elementwise_reduction rsqrt f64 4 33554432 25.698 ± 0.388 - 25.171 ± 0.434 26.412 ± 0.122 40.331 ± 0.400 218.422 ± 3.966 60.923 ± 0.387
cpu/elementwise_reduction select f64 1 33554432 72.925 ± 0.738 - 71.795 ± 0.620 85.959 ± 1.493 95.327 ± 0.650 79.768 ± 4.043 -
cpu/elementwise_reduction select f64 4 33554432 28.215 ± 0.188 - 27.465 ± 0.349 29.032 ± 0.177 28.888 ± 0.492 75.103 ± 0.551 -
cpu/elementwise_reduction sign f64 1 33554432 69.031 ± 0.847 - 67.421 ± 2.224 71.102 ± 2.620 70.213 ± 2.848 72.314 ± 4.444 114.926 ± 0.238
cpu/elementwise_reduction sign f64 4 33554432 23.016 ± 0.235 - 22.310 ± 0.434 22.159 ± 0.253 23.135 ± 0.717 68.732 ± 2.804 43.823 ± 0.352
cpu/elementwise_reduction sin f64 1 8388608 116.183 ± 0.507 - 116.416 ± 0.985 48.933 ± 0.183 117.030 ± 0.349 53.733 ± 4.661 58.929 ± 5.403
cpu/elementwise_reduction sin f64 4 8388608 29.542 ± 0.316 - 29.536 ± 0.257 13.053 ± 0.111 30.063 ± 0.168 54.180 ± 5.314 15.000 ± 6.759
cpu/elementwise_reduction sqrt f64 1 33554432 78.733 ± 1.236 - 77.518 ± 1.855 141.025 ± 1.159 68.540 ± 2.796 156.996 ± 1.251 161.006 ± 3.544
cpu/elementwise_reduction sqrt f64 4 33554432 22.861 ± 0.316 - 22.521 ± 0.181 36.903 ± 0.329 22.734 ± 0.291 163.600 ± 1.460 49.951 ± 0.921
cpu/elementwise_reduction sub f64 1 33554432 72.486 ± 1.413 - 70.046 ± 0.288 71.423 ± 1.122 77.846 ± 3.080 75.031 ± 1.736 131.378 ± 0.378
cpu/elementwise_reduction sub f64 4 33554432 27.275 ± 0.453 - 26.055 ± 0.247 26.740 ± 0.213 28.457 ± 0.247 73.719 ± 0.360 45.827 ± 0.892
cpu/elementwise_reduction tanh f64 1 8388608 112.009 ± 0.382 - 110.714 ± 0.351 67.300 ± 0.081 20.427 ± 0.078 64.733 ± 6.014 71.853 ± 3.858
cpu/elementwise_reduction tanh f64 4 8388608 28.472 ± 0.568 - 28.406 ± 0.469 18.092 ± 0.229 6.570 ± 0.356 64.733 ± 3.979 19.328 ± 5.143
cpu/indexing_layout concatenate f64 1 1048576+1048576 0.579 ± 0.109 - 1.217 ± 0.134 0.525 ± 0.136 0.528 ± 0.174 3.944 ± 1.912 -
cpu/indexing_layout concatenate f64 4 1048576+1048576 0.482 ± 0.517 - 1.062 ± 0.166 0.184 ± 0.013 0.664 ± 0.188 1.027 ± 0.252 -
cpu/indexing_layout dynamic_slice f64 1 4194304 -> 2097152 0.542 ± 0.041 - 2.359 ± 0.079 0.519 ± 0.032 0.589 ± 0.185 1.114 ± 0.460 -
cpu/indexing_layout dynamic_slice f64 4 4194304 -> 2097152 0.548 ± 0.498 - 2.188 ± 0.771 0.180 ± 0.011 0.334 ± 0.085 0.944 ± 0.478 -
cpu/indexing_layout dynamic_update_slice f64 1 2097152 0.848 ± 0.018 - unsupported 0.797 ± 0.082 0.751 ± 0.009 3.637 ± 3.179 -
cpu/indexing_layout dynamic_update_slice f64 4 2097152 0.605 ± 0.716 - unsupported 0.414 ± 0.095 0.553 ± 0.043 4.207 ± 1.545 -
cpu/indexing_layout gather f64 1 262144 0.486 ± 0.003 - 0.623 ± 0.095 0.631 ± 0.014 0.311 ± 0.007 0.736 ± 0.121 -
cpu/indexing_layout gather f64 4 262144 0.291 ± 0.165 - 0.651 ± 0.141 0.166 ± 0.006 0.103 ± 0.092 0.780 ± 0.061 -
cpu/indexing_layout pad f64 1 2097152 0.776 ± 0.060 - 1.556 ± 0.372 0.753 ± 0.023 0.906 ± 0.006 - -
cpu/indexing_layout pad f64 4 2097152 0.288 ± 0.166 - 1.102 ± 0.861 0.261 ± 0.007 0.325 ± 0.086 - -
cpu/indexing_layout reverse f64 1 2097152 0.532 ± 0.141 - 1.158 ± 0.013 0.537 ± 0.118 0.576 ± 0.128 1.508 ± 3.778 -
cpu/indexing_layout reverse f64 4 2097152 0.233 ± 0.189 - 1.351 ± 0.461 0.182 ± 0.025 0.344 ± 0.191 3.674 ± 3.608 -
cpu/indexing_layout scatter f64 1 262144 0.867 ± 0.006 - 1.083 ± 0.062 0.351 ± 0.005 0.303 ± 0.016 0.382 ± 0.474 -
cpu/indexing_layout scatter f64 4 262144 0.882 ± 0.010 - 1.292 ± 0.063 0.309 ± 0.003 0.390 ± 0.049 0.402 ± 0.504 -
cpu/indexing_layout slice f64 1 4194304 -> 2096128 1.169 ± 0.052 - 2.795 ± 0.145 1.155 ± 0.102 0.935 ± 0.118 5.537 ± 0.514 -
cpu/indexing_layout slice f64 4 4194304 -> 2096128 0.972 ± 0.149 - 1.982 ± 0.671 0.633 ± 0.025 0.697 ± 0.013 5.463 ± 2.152 -
cpu/linalg_batch_families batched_cholesky f64 1 1024x2x2 0.053 ± 0.000 - 0.072 ± 0.006 0.075 ± 0.000 0.079 ± 0.004 - -
cpu/linalg_batch_families batched_cholesky f64 1 1024x4x4 0.116 ± 0.001 - 0.133 ± 0.007 0.107 ± 0.001 0.132 ± 0.003 - -
cpu/linalg_batch_families batched_cholesky f64 1 1024x8x8 0.269 ± 0.005 - 0.301 ± 0.017 0.273 ± 0.004 0.278 ± 0.010 - -
cpu/linalg_batch_families batched_cholesky f64 1 1x128x128 0.074 ± 0.001 - 0.090 ± 0.007 0.181 ± 0.004 0.097 ± 0.007 - -
cpu/linalg_batch_families batched_cholesky f64 1 1x2x2 0.002 ± 0.000 - 0.016 ± 0.020 0.004 ± 0.000 0.007 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 1 1x32x32 0.008 ± 0.000 - 0.023 ± 0.004 0.008 ± 0.000 0.014 ± 0.006 - -
cpu/linalg_batch_families batched_cholesky f64 1 1x4x4 0.001 ± 0.000 - 0.019 ± 0.001 0.004 ± 0.000 0.007 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 1 1x8x8 0.003 ± 0.000 - 0.020 ± 0.002 0.004 ± 0.000 0.007 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 1 3x2x2 0.002 ± 0.000 - 0.020 ± 0.001 0.004 ± 0.000 0.007 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 1 3x4x4 0.003 ± 0.000 - 0.020 ± 0.002 0.004 ± 0.000 0.007 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 1 3x8x8 0.004 ± 0.000 - 0.020 ± 0.001 0.005 ± 0.000 0.008 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 1 4x2x2 0.002 ± 0.000 - 0.020 ± 0.000 0.004 ± 0.000 0.007 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 1 4x4x4 0.001 ± 0.000 - 0.019 ± 0.001 0.004 ± 0.000 0.007 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 1 4x8x8 0.002 ± 0.000 - 0.021 ± 0.001 0.005 ± 0.000 0.012 ± 0.005 - -
cpu/linalg_batch_families batched_cholesky f64 1 8x128x128 0.591 ± 0.004 - 0.650 ± 0.006 1.426 ± 0.006 0.716 ± 0.008 - -
cpu/linalg_batch_families batched_cholesky f64 1 8x2x2 0.003 ± 0.000 - 0.021 ± 0.003 0.004 ± 0.000 0.007 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 1 8x32x32 0.023 ± 0.000 - 0.043 ± 0.001 0.034 ± 0.000 0.056 ± 0.009 - -
cpu/linalg_batch_families batched_cholesky f64 1 8x4x4 0.002 ± 0.000 - 0.021 ± 0.005 0.005 ± 0.000 0.008 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 1 8x8x8 0.003 ± 0.000 - 0.022 ± 0.001 0.006 ± 0.000 0.013 ± 0.006 - -
cpu/linalg_batch_families batched_cholesky f64 4 1024x2x2 0.053 ± 0.000 - 0.077 ± 0.017 0.042 ± 0.000 0.087 ± 0.002 - -
cpu/linalg_batch_families batched_cholesky f64 4 1024x4x4 0.108 ± 0.001 - 0.130 ± 0.014 0.065 ± 0.000 0.134 ± 0.003 - -
cpu/linalg_batch_families batched_cholesky f64 4 1024x8x8 0.269 ± 0.005 - 0.316 ± 0.036 0.207 ± 0.001 0.327 ± 0.023 - -
cpu/linalg_batch_families batched_cholesky f64 4 1x128x128 0.073 ± 0.002 - 0.108 ± 0.018 0.129 ± 0.002 0.102 ± 0.004 - -
cpu/linalg_batch_families batched_cholesky f64 4 1x2x2 0.002 ± 0.000 - 0.019 ± 0.006 0.005 ± 0.000 0.015 ± 0.002 - -
cpu/linalg_batch_families batched_cholesky f64 4 1x32x32 0.004 ± 0.000 - 0.024 ± 0.007 0.009 ± 0.000 0.019 ± 0.009 - -
cpu/linalg_batch_families batched_cholesky f64 4 1x4x4 0.001 ± 0.000 - 0.024 ± 0.003 0.005 ± 0.000 0.007 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 4 1x8x8 0.001 ± 0.000 - 0.024 ± 0.003 0.005 ± 0.000 0.007 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 4 3x2x2 0.002 ± 0.000 - 0.024 ± 0.003 0.005 ± 0.000 0.014 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 4 3x4x4 0.001 ± 0.000 - 0.021 ± 0.007 0.005 ± 0.000 0.014 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 4 3x8x8 0.002 ± 0.001 - 0.019 ± 0.003 0.005 ± 0.000 0.008 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 4 4x2x2 0.001 ± 0.000 - 0.019 ± 0.006 0.005 ± 0.000 0.007 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 4 4x4x4 0.001 ± 0.001 - 0.020 ± 0.006 0.005 ± 0.000 0.007 ± 0.000 - -
cpu/linalg_batch_families batched_cholesky f64 4 4x8x8 0.002 ± 0.000 - 0.019 ± 0.002 0.006 ± 0.000 0.013 ± 0.004 - -
cpu/linalg_batch_families batched_cholesky f64 4 8x128x128 0.599 ± 0.005 - 0.703 ± 0.040 0.945 ± 0.005 0.383 ± 0.081 - -
cpu/linalg_batch_families batched_cholesky f64 4 8x2x2 0.001 ± 0.000 - 0.020 ± 0.006 0.005 ± 0.000 0.008 ± 0.007 - -
cpu/linalg_batch_families batched_cholesky f64 4 8x32x32 0.023 ± 0.000 - 0.041 ± 0.004 0.032 ± 0.000 0.031 ± 0.025 - -
cpu/linalg_batch_families batched_cholesky f64 4 8x4x4 0.002 ± 0.000 - 0.021 ± 0.005 0.005 ± 0.000 0.008 ± 0.001 - -
cpu/linalg_batch_families batched_cholesky f64 4 8x8x8 0.003 ± 0.001 - 0.020 ± 0.001 0.006 ± 0.000 0.014 ± 0.002 - -
cpu/linalg_batch_families batched_eigh c64 1 1024x2x2 0.530 ± 0.004 - 0.559 ± 0.005 0.711 ± 0.007 0.843 ± 0.006 - -
cpu/linalg_batch_families batched_eigh c64 1 1024x4x4 2.236 ± 0.008 - 2.311 ± 0.022 2.391 ± 0.011 3.362 ± 0.035 - -
cpu/linalg_batch_families batched_eigh c64 1 1024x8x8 7.115 ± 0.016 - 7.148 ± 0.028 7.277 ± 0.025 9.945 ± 0.064 - -
cpu/linalg_batch_families batched_eigh c64 1 1x128x128 3.858 ± 0.010 - 3.945 ± 0.008 3.514 ± 0.016 2.702 ± 0.047 - -
cpu/linalg_batch_families batched_eigh c64 1 1x2x2 0.005 ± 0.000 - 0.024 ± 0.005 0.007 ± 0.000 0.010 ± 0.000 - -
cpu/linalg_batch_families batched_eigh c64 1 1x32x32 0.118 ± 0.001 - 0.161 ± 0.015 0.118 ± 0.000 0.140 ± 0.021 - -
cpu/linalg_batch_families batched_eigh c64 1 1x4x4 0.008 ± 0.000 - 0.029 ± 0.001 0.008 ± 0.000 0.013 ± 0.000 - -
cpu/linalg_batch_families batched_eigh c64 1 1x8x8 0.017 ± 0.000 - 0.049 ± 0.016 0.013 ± 0.000 0.020 ± 0.001 - -
cpu/linalg_batch_families batched_eigh c64 1 3x2x2 0.003 ± 0.000 - 0.039 ± 0.001 0.008 ± 0.000 0.012 ± 0.000 - -
cpu/linalg_batch_families batched_eigh c64 1 3x4x4 0.016 ± 0.000 - 0.034 ± 0.001 0.013 ± 0.000 0.018 ± 0.018 - -
cpu/linalg_batch_families batched_eigh c64 1 3x8x8 0.044 ± 0.022 - 0.049 ± 0.007 0.027 ± 0.000 0.042 ± 0.008 - -
cpu/linalg_batch_families batched_eigh c64 1 4x2x2 0.004 ± 0.000 - 0.030 ± 0.001 0.009 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_eigh c64 1 4x4x4 0.021 ± 0.000 - 0.035 ± 0.002 0.015 ± 0.000 0.022 ± 0.002 - -
cpu/linalg_batch_families batched_eigh c64 1 4x8x8 0.058 ± 0.000 - 0.055 ± 0.001 0.034 ± 0.000 0.088 ± 0.047 - -
cpu/linalg_batch_families batched_eigh c64 1 8x128x128 30.818 ± 0.069 - 30.894 ± 0.181 27.928 ± 0.035 21.889 ± 0.113 - -
cpu/linalg_batch_families batched_eigh c64 1 8x2x2 0.006 ± 0.000 - 0.032 ± 0.001 0.012 ± 0.000 0.016 ± 0.001 - -
cpu/linalg_batch_families batched_eigh c64 1 8x32x32 0.932 ± 0.004 - 0.977 ± 0.017 0.912 ± 0.004 1.026 ± 0.036 - -
cpu/linalg_batch_families batched_eigh c64 1 8x4x4 0.038 ± 0.000 - 0.044 ± 0.001 0.025 ± 0.000 0.033 ± 0.000 - -
cpu/linalg_batch_families batched_eigh c64 1 8x8x8 0.057 ± 0.056 - 0.085 ± 0.018 0.062 ± 0.000 0.091 ± 0.005 - -
cpu/linalg_batch_families batched_eigh c64 4 1024x2x2 0.537 ± 0.004 - 0.910 ± 0.008 0.678 ± 0.005 0.882 ± 0.006 - -
cpu/linalg_batch_families batched_eigh c64 4 1024x4x4 2.250 ± 0.016 - 2.301 ± 0.409 2.362 ± 0.007 2.018 ± 0.159 - -
cpu/linalg_batch_families batched_eigh c64 4 1024x8x8 7.104 ± 0.046 - 7.491 ± 0.047 7.263 ± 0.006 6.067 ± 0.156 - -
cpu/linalg_batch_families batched_eigh c64 4 1x128x128 2.902 ± 0.017 - 3.465 ± 0.525 1.518 ± 0.017 3.005 ± 0.136 - -
cpu/linalg_batch_families batched_eigh c64 4 1x2x2 0.003 ± 0.000 - 0.030 ± 0.008 0.007 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_eigh c64 4 1x32x32 0.119 ± 0.004 - 0.154 ± 0.019 0.123 ± 0.001 0.140 ± 0.014 - -
cpu/linalg_batch_families batched_eigh c64 4 1x4x4 0.004 ± 0.000 - 0.028 ± 0.007 0.008 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_eigh c64 4 1x8x8 0.017 ± 0.000 - 0.031 ± 0.002 0.013 ± 0.000 0.020 ± 0.001 - -
cpu/linalg_batch_families batched_eigh c64 4 3x2x2 0.005 ± 0.000 - 0.036 ± 0.013 0.008 ± 0.000 0.024 ± 0.013 - -
cpu/linalg_batch_families batched_eigh c64 4 3x4x4 0.008 ± 0.000 - 0.028 ± 0.003 0.013 ± 0.000 0.018 ± 0.000 - -
cpu/linalg_batch_families batched_eigh c64 4 3x8x8 0.022 ± 0.000 - 0.044 ± 0.002 0.027 ± 0.000 0.039 ± 0.004 - -
cpu/linalg_batch_families batched_eigh c64 4 4x2x2 0.006 ± 0.002 - 0.030 ± 0.006 0.009 ± 0.000 0.014 ± 0.001 - -
cpu/linalg_batch_families batched_eigh c64 4 4x4x4 0.010 ± 0.000 - 0.033 ± 0.001 0.015 ± 0.000 0.022 ± 0.022 - -
cpu/linalg_batch_families batched_eigh c64 4 4x8x8 0.029 ± 0.000 - 0.049 ± 0.001 0.034 ± 0.000 0.051 ± 0.044 - -
cpu/linalg_batch_families batched_eigh c64 4 8x128x128 19.238 ± 3.291 - 25.058 ± 1.883 11.775 ± 0.014 10.978 ± 0.599 - -
cpu/linalg_batch_families batched_eigh c64 4 8x2x2 0.009 ± 0.000 - 0.033 ± 0.003 0.011 ± 0.000 0.017 ± 0.000 - -
cpu/linalg_batch_families batched_eigh c64 4 8x32x32 0.934 ± 0.006 - 0.975 ± 0.019 0.943 ± 0.003 0.432 ± 0.024 - -
cpu/linalg_batch_families batched_eigh c64 4 8x4x4 0.019 ± 0.000 - 0.039 ± 0.008 0.024 ± 0.000 0.034 ± 0.001 - -
cpu/linalg_batch_families batched_eigh c64 4 8x8x8 0.057 ± 0.001 - 0.080 ± 0.006 0.062 ± 0.000 0.090 ± 0.002 - -
cpu/linalg_batch_families batched_eigh f64 1 1024x2x2 0.625 ± 0.010 - 0.668 ± 0.009 0.397 ± 0.003 0.356 ± 0.006 - -
cpu/linalg_batch_families batched_eigh f64 1 1024x4x4 2.245 ± 0.011 - 2.296 ± 0.011 2.071 ± 0.017 2.098 ± 0.018 - -
cpu/linalg_batch_families batched_eigh f64 1 1024x8x8 6.229 ± 0.019 - 6.329 ± 0.046 6.251 ± 0.017 6.997 ± 0.035 - -
cpu/linalg_batch_families batched_eigh f64 1 1x128x128 1.458 ± 0.046 - 1.541 ± 0.046 1.492 ± 0.010 1.411 ± 0.026 - -
cpu/linalg_batch_families batched_eigh f64 1 1x2x2 0.002 ± 0.000 - 0.027 ± 0.003 0.006 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 1 1x32x32 0.073 ± 0.030 - 0.101 ± 0.006 0.084 ± 0.001 0.108 ± 0.004 - -
cpu/linalg_batch_families batched_eigh f64 1 1x4x4 0.008 ± 0.000 - 0.030 ± 0.002 0.008 ± 0.000 0.011 ± 0.000 - -
cpu/linalg_batch_families batched_eigh f64 1 1x8x8 0.014 ± 0.000 - 0.033 ± 0.002 0.011 ± 0.000 0.016 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 1 3x2x2 0.004 ± 0.000 - 0.039 ± 0.001 0.007 ± 0.000 0.010 ± 0.011 - -
cpu/linalg_batch_families batched_eigh f64 1 3x4x4 0.008 ± 0.000 - 0.035 ± 0.005 0.012 ± 0.000 0.015 ± 0.000 - -
cpu/linalg_batch_families batched_eigh f64 1 3x8x8 0.039 ± 0.000 - 0.045 ± 0.001 0.024 ± 0.000 0.030 ± 0.030 - -
cpu/linalg_batch_families batched_eigh f64 1 4x2x2 0.004 ± 0.000 - 0.030 ± 0.006 0.008 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 1 4x4x4 0.010 ± 0.000 - 0.037 ± 0.001 0.014 ± 0.000 0.035 ± 0.018 - -
cpu/linalg_batch_families batched_eigh f64 1 4x8x8 0.051 ± 0.000 - 0.051 ± 0.000 0.030 ± 0.000 0.037 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 1 8x128x128 11.333 ± 0.097 - 11.367 ± 0.125 11.720 ± 0.053 11.125 ± 0.028 - -
cpu/linalg_batch_families batched_eigh f64 1 8x2x2 0.007 ± 0.000 - 0.031 ± 0.001 0.009 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 1 8x32x32 0.571 ± 0.004 - 0.612 ± 0.049 0.633 ± 0.004 0.773 ± 0.041 - -
cpu/linalg_batch_families batched_eigh f64 1 8x4x4 0.019 ± 0.000 - 0.044 ± 0.001 0.021 ± 0.000 0.026 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 1 8x8x8 0.049 ± 0.000 - 0.081 ± 0.007 0.053 ± 0.000 0.068 ± 0.005 - -
cpu/linalg_batch_families batched_eigh f64 4 1024x2x2 0.604 ± 0.008 - 0.644 ± 0.021 0.398 ± 0.002 0.352 ± 0.008 - -
cpu/linalg_batch_families batched_eigh f64 4 1024x4x4 2.215 ± 0.015 - 2.559 ± 0.464 2.035 ± 0.004 1.397 ± 0.050 - -
cpu/linalg_batch_families batched_eigh f64 4 1024x8x8 6.196 ± 0.033 - 7.098 ± 0.382 6.217 ± 0.024 3.654 ± 1.005 - -
cpu/linalg_batch_families batched_eigh f64 4 1x128x128 1.233 ± 0.027 - 6.241 ± 3.198 0.862 ± 0.019 1.415 ± 0.026 - -
cpu/linalg_batch_families batched_eigh f64 4 1x2x2 0.003 ± 0.001 - 0.033 ± 0.008 0.006 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 4 1x32x32 0.104 ± 0.001 - 0.152 ± 0.102 0.087 ± 0.001 0.104 ± 0.002 - -
cpu/linalg_batch_families batched_eigh f64 4 1x4x4 0.004 ± 0.002 - 0.035 ± 0.011 0.008 ± 0.000 0.012 ± 0.012 - -
cpu/linalg_batch_families batched_eigh f64 4 1x8x8 0.010 ± 0.000 - 0.040 ± 0.004 0.012 ± 0.000 0.016 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 4 3x2x2 0.006 ± 0.002 - 0.030 ± 0.012 0.007 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 4 3x4x4 0.008 ± 0.000 - 0.035 ± 0.011 0.012 ± 0.000 0.030 ± 0.015 - -
cpu/linalg_batch_families batched_eigh f64 4 3x8x8 0.026 ± 0.000 - 0.051 ± 0.005 0.024 ± 0.000 0.031 ± 0.002 - -
cpu/linalg_batch_families batched_eigh f64 4 4x2x2 0.004 ± 0.001 - 0.028 ± 0.010 0.008 ± 0.000 0.011 ± 0.010 - -
cpu/linalg_batch_families batched_eigh f64 4 4x4x4 0.010 ± 0.000 - 0.036 ± 0.019 0.014 ± 0.000 0.018 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 4 4x8x8 0.034 ± 0.000 - 0.058 ± 0.005 0.030 ± 0.000 0.037 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 4 8x128x128 8.394 ± 1.018 - 9.481 ± 0.926 6.627 ± 0.028 5.742 ± 2.461 - -
cpu/linalg_batch_families batched_eigh f64 4 8x2x2 0.007 ± 0.000 - 0.031 ± 0.005 0.009 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 4 8x32x32 0.696 ± 0.078 - 0.919 ± 0.069 0.658 ± 0.005 0.278 ± 0.145 - -
cpu/linalg_batch_families batched_eigh f64 4 8x4x4 0.026 ± 0.000 - 0.051 ± 0.002 0.021 ± 0.000 0.026 ± 0.001 - -
cpu/linalg_batch_families batched_eigh f64 4 8x8x8 0.065 ± 0.000 - 0.083 ± 0.018 0.053 ± 0.000 0.065 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 1024x2x2 0.231 ± 0.002 - 0.261 ± 0.007 0.210 ± 0.003 0.358 ± 0.009 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 1024x4x4 1.147 ± 0.007 - 1.185 ± 0.019 1.045 ± 0.007 2.084 ± 0.016 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 1024x8x8 3.534 ± 0.008 - 3.619 ± 0.053 3.307 ± 0.017 6.973 ± 0.042 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 1x128x128 0.610 ± 0.004 - 0.633 ± 0.013 0.641 ± 0.005 1.381 ± 0.024 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 1x2x2 0.004 ± 0.002 - 0.036 ± 0.001 0.007 ± 0.000 0.008 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 1x32x32 0.036 ± 0.014 - 0.055 ± 0.002 0.041 ± 0.000 0.105 ± 0.006 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 1x4x4 0.005 ± 0.000 - 0.026 ± 0.003 0.008 ± 0.000 0.009 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 1x8x8 0.009 ± 0.000 - 0.022 ± 0.001 0.010 ± 0.000 0.014 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 3x2x2 0.004 ± 0.000 - 0.019 ± 0.002 0.007 ± 0.000 0.008 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 3x4x4 0.005 ± 0.000 - 0.023 ± 0.001 0.010 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 3x8x8 0.023 ± 0.000 - 0.030 ± 0.001 0.017 ± 0.000 0.028 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 4x2x2 0.005 ± 0.000 - 0.020 ± 0.001 0.008 ± 0.000 0.017 ± 0.008 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 4x4x4 0.012 ± 0.000 - 0.024 ± 0.001 0.011 ± 0.000 0.015 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 4x8x8 0.030 ± 0.000 - 0.034 ± 0.001 0.020 ± 0.000 0.034 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 8x128x128 4.888 ± 0.006 - 5.010 ± 0.056 5.105 ± 0.012 10.832 ± 0.040 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 8x2x2 0.006 ± 0.000 - 0.020 ± 0.001 0.009 ± 0.000 0.010 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 8x32x32 0.268 ± 0.003 - 0.303 ± 0.011 0.270 ± 0.002 0.763 ± 0.006 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 8x4x4 0.020 ± 0.000 - 0.029 ± 0.000 0.015 ± 0.000 0.023 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 1 8x8x8 0.028 ± 0.000 - 0.051 ± 0.004 0.033 ± 0.000 0.067 ± 0.007 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 1024x2x2 0.226 ± 0.006 - 0.263 ± 0.005 0.210 ± 0.001 0.376 ± 0.041 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 1024x4x4 1.157 ± 0.005 - 1.180 ± 0.014 1.048 ± 0.001 1.314 ± 0.038 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 1024x8x8 3.527 ± 0.017 - 4.057 ± 0.237 3.290 ± 0.004 3.647 ± 1.213 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 1x128x128 0.579 ± 0.006 - 0.650 ± 0.147 0.585 ± 0.007 1.378 ± 0.054 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 1x2x2 0.003 ± 0.001 - 0.027 ± 0.006 0.007 ± 0.000 0.008 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 1x32x32 0.036 ± 0.033 - 0.056 ± 0.012 0.041 ± 0.000 0.105 ± 0.102 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 1x4x4 0.003 ± 0.000 - 0.027 ± 0.002 0.008 ± 0.000 0.009 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 1x8x8 0.006 ± 0.000 - 0.038 ± 0.003 0.010 ± 0.000 0.014 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 3x2x2 0.003 ± 0.001 - 0.032 ± 0.001 0.008 ± 0.000 0.008 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 3x4x4 0.005 ± 0.001 - 0.030 ± 0.002 0.010 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 3x8x8 0.014 ± 0.000 - 0.053 ± 0.015 0.017 ± 0.000 0.028 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 4x2x2 0.002 ± 0.000 - 0.033 ± 0.005 0.008 ± 0.000 0.009 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 4x4x4 0.006 ± 0.000 - 0.031 ± 0.001 0.011 ± 0.000 0.015 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 4x8x8 0.018 ± 0.000 - 0.040 ± 0.002 0.020 ± 0.000 0.035 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 8x128x128 5.604 ± 0.031 - 6.530 ± 1.297 4.504 ± 0.010 3.586 ± 2.125 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 8x2x2 0.003 ± 0.001 - 0.028 ± 0.001 0.009 ± 0.000 0.020 ± 0.001 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 8x32x32 0.270 ± 0.003 - 0.310 ± 0.014 0.272 ± 0.003 0.269 ± 0.019 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 8x4x4 0.010 ± 0.000 - 0.035 ± 0.003 0.015 ± 0.000 0.023 ± 0.000 - -
cpu/linalg_batch_families batched_eigvalsh f64 4 8x8x8 0.034 ± 0.000 - 0.053 ± 0.002 0.033 ± 0.000 0.087 ± 0.057 - -
cpu/linalg_batch_families batched_lu f64 1 1024x2x2 0.076 ± 0.001 - 0.124 ± 0.007 0.168 ± 0.001 0.104 ± 0.004 - -
cpu/linalg_batch_families batched_lu f64 1 1024x4x4 0.136 ± 0.001 - 0.169 ± 0.044 0.231 ± 0.003 0.191 ± 0.002 - -
cpu/linalg_batch_families batched_lu f64 1 1024x8x8 0.400 ± 0.006 - 0.469 ± 0.014 0.519 ± 0.005 0.563 ± 0.007 - -
cpu/linalg_batch_families batched_lu f64 1 1x128x128 0.112 ± 0.004 - 0.145 ± 0.016 0.172 ± 0.001 0.177 ± 0.006 - -
cpu/linalg_batch_families batched_lu f64 1 1x2x2 0.002 ± 0.000 - 0.054 ± 0.014 0.010 ± 0.000 0.023 ± 0.012 - -
cpu/linalg_batch_families batched_lu f64 1 1x32x32 0.011 ± 0.000 - 0.052 ± 0.002 0.018 ± 0.000 0.030 ± 0.023 - -
cpu/linalg_batch_families batched_lu f64 1 1x4x4 0.002 ± 0.000 - 0.040 ± 0.002 0.010 ± 0.000 0.024 ± 0.002 - -
cpu/linalg_batch_families batched_lu f64 1 1x64x24 0.011 ± 0.000 - 0.054 ± 0.006 0.019 ± 0.000 0.025 ± 0.004 - -
cpu/linalg_batch_families batched_lu f64 1 1x8x8 0.003 ± 0.001 - 0.039 ± 0.001 0.010 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 1 3x2x2 0.003 ± 0.000 - 0.041 ± 0.001 0.011 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 1 3x4x4 0.003 ± 0.000 - 0.041 ± 0.004 0.011 ± 0.000 0.024 ± 0.013 - -
cpu/linalg_batch_families batched_lu f64 1 3x8x8 0.004 ± 0.000 - 0.041 ± 0.004 0.012 ± 0.000 0.021 ± 0.004 - -
cpu/linalg_batch_families batched_lu f64 1 4x2x2 0.003 ± 0.000 - 0.041 ± 0.001 0.011 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 1 4x4x4 0.003 ± 0.000 - 0.040 ± 0.002 0.012 ± 0.000 0.013 ± 0.000 - -
cpu/linalg_batch_families batched_lu f64 1 4x8x8 0.004 ± 0.000 - 0.043 ± 0.002 0.013 ± 0.000 0.021 ± 0.008 - -
cpu/linalg_batch_families batched_lu f64 1 8x128x128 0.877 ± 0.003 - 0.967 ± 0.054 1.316 ± 0.003 1.270 ± 0.023 - -
cpu/linalg_batch_families batched_lu f64 1 8x2x2 0.003 ± 0.000 - 0.042 ± 0.001 0.012 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 1 8x32x32 0.069 ± 0.001 - 0.113 ± 0.006 0.078 ± 0.000 0.082 ± 0.006 - -
cpu/linalg_batch_families batched_lu f64 1 8x4x4 0.003 ± 0.000 - 0.041 ± 0.004 0.012 ± 0.000 0.017 ± 0.005 - -
cpu/linalg_batch_families batched_lu f64 1 8x8x8 0.006 ± 0.000 - 0.044 ± 0.004 0.015 ± 0.000 0.021 ± 0.009 - -
cpu/linalg_batch_families batched_lu f64 4 1024x2x2 0.079 ± 0.000 - 0.112 ± 0.006 0.088 ± 0.001 0.104 ± 0.002 - -
cpu/linalg_batch_families batched_lu f64 4 1024x4x4 0.136 ± 0.001 - 0.177 ± 0.018 0.129 ± 0.026 0.188 ± 0.004 - -
cpu/linalg_batch_families batched_lu f64 4 1024x8x8 0.417 ± 0.005 - 0.495 ± 0.014 0.213 ± 0.002 0.490 ± 0.058 - -
cpu/linalg_batch_families batched_lu f64 4 1x128x128 0.112 ± 0.001 - 0.174 ± 0.027 0.164 ± 0.001 0.191 ± 0.010 - -
cpu/linalg_batch_families batched_lu f64 4 1x2x2 0.002 ± 0.000 - 0.032 ± 0.004 0.011 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 4 1x32x32 0.011 ± 0.001 - 0.062 ± 0.004 0.019 ± 0.000 0.031 ± 0.007 - -
cpu/linalg_batch_families batched_lu f64 4 1x4x4 0.003 ± 0.000 - 0.031 ± 0.002 0.011 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 4 1x64x24 0.011 ± 0.000 - 0.063 ± 0.004 0.021 ± 0.001 0.022 ± 0.013 - -
cpu/linalg_batch_families batched_lu f64 4 1x8x8 0.003 ± 0.000 - 0.031 ± 0.004 0.011 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 4 3x2x2 0.003 ± 0.001 - 0.032 ± 0.005 0.013 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 4 3x4x4 0.003 ± 0.000 - 0.031 ± 0.006 0.013 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 4 3x8x8 0.004 ± 0.001 - 0.034 ± 0.010 0.014 ± 0.000 0.013 ± 0.003 - -
cpu/linalg_batch_families batched_lu f64 4 4x2x2 0.003 ± 0.000 - 0.031 ± 0.002 0.013 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 4 4x4x4 0.003 ± 0.001 - 0.032 ± 0.002 0.013 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 4 4x8x8 0.004 ± 0.000 - 0.033 ± 0.002 0.014 ± 0.000 0.016 ± 0.006 - -
cpu/linalg_batch_families batched_lu f64 4 8x128x128 0.875 ± 0.004 - 0.963 ± 0.033 0.354 ± 0.006 0.688 ± 0.042 - -
cpu/linalg_batch_families batched_lu f64 4 8x2x2 0.003 ± 0.000 - 0.029 ± 0.003 0.013 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_lu f64 4 8x32x32 0.069 ± 0.001 - 0.123 ± 0.021 0.039 ± 0.000 0.087 ± 0.018 - -
cpu/linalg_batch_families batched_lu f64 4 8x4x4 0.003 ± 0.000 - 0.031 ± 0.002 0.014 ± 0.000 0.019 ± 0.004 - -
cpu/linalg_batch_families batched_lu f64 4 8x8x8 0.006 ± 0.000 - 0.035 ± 0.002 0.016 ± 0.000 0.018 ± 0.006 - -
cpu/linalg_batch_families batched_qr f64 1 1024x2x2 0.206 ± 0.004 - 0.248 ± 0.009 0.195 ± 0.000 0.265 ± 0.019 - -
cpu/linalg_batch_families batched_qr f64 1 1024x4x4 0.604 ± 0.004 - 0.651 ± 0.011 0.532 ± 0.005 0.746 ± 0.004 - -
cpu/linalg_batch_families batched_qr f64 1 1024x8x8 1.394 ± 0.010 - 1.446 ± 0.034 1.379 ± 0.008 2.187 ± 0.008 - -
cpu/linalg_batch_families batched_qr f64 1 1x128x128 0.524 ± 0.006 - 0.579 ± 0.009 0.648 ± 0.008 0.562 ± 0.008 - -
cpu/linalg_batch_families batched_qr f64 1 1x2x2 0.004 ± 0.000 - 0.027 ± 0.001 0.005 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 1 1x32x32 0.036 ± 0.000 - 0.043 ± 0.001 0.024 ± 0.000 0.034 ± 0.004 - -
cpu/linalg_batch_families batched_qr f64 1 1x4x4 0.005 ± 0.000 - 0.026 ± 0.001 0.005 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 1 1x64x24 0.042 ± 0.009 - 0.053 ± 0.018 0.028 ± 0.000 0.031 ± 0.004 - -
cpu/linalg_batch_families batched_qr f64 1 1x8x8 0.007 ± 0.000 - 0.030 ± 0.002 0.005 ± 0.000 0.024 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 1 3x2x2 0.002 ± 0.000 - 0.028 ± 0.001 0.005 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 1 3x4x4 0.004 ± 0.000 - 0.028 ± 0.002 0.006 ± 0.000 0.012 ± 0.000 - -
cpu/linalg_batch_families batched_qr f64 1 3x8x8 0.012 ± 0.000 - 0.031 ± 0.001 0.008 ± 0.000 0.017 ± 0.017 - -
cpu/linalg_batch_families batched_qr f64 1 4x2x2 0.003 ± 0.000 - 0.028 ± 0.001 0.005 ± 0.000 0.021 ± 0.012 - -
cpu/linalg_batch_families batched_qr f64 1 4x4x4 0.004 ± 0.000 - 0.028 ± 0.001 0.006 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 1 4x8x8 0.015 ± 0.000 - 0.032 ± 0.002 0.010 ± 0.000 0.019 ± 0.020 - -
cpu/linalg_batch_families batched_qr f64 1 8x128x128 4.156 ± 0.015 - 4.268 ± 0.044 5.120 ± 0.018 4.459 ± 0.017 - -
cpu/linalg_batch_families batched_qr f64 1 8x2x2 0.007 ± 0.000 - 0.029 ± 0.001 0.006 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 1 8x32x32 0.130 ± 0.001 - 0.147 ± 0.003 0.164 ± 0.000 0.188 ± 0.011 - -
cpu/linalg_batch_families batched_qr f64 1 8x4x4 0.007 ± 0.000 - 0.034 ± 0.006 0.008 ± 0.000 0.016 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 1 8x8x8 0.025 ± 0.000 - 0.037 ± 0.002 0.015 ± 0.000 0.027 ± 0.000 - -
cpu/linalg_batch_families batched_qr f64 4 1024x2x2 0.206 ± 0.006 - 0.235 ± 0.007 0.165 ± 0.001 0.259 ± 0.003 - -
cpu/linalg_batch_families batched_qr f64 4 1024x4x4 0.605 ± 0.006 - 0.643 ± 0.023 0.495 ± 0.003 0.758 ± 0.003 - -
cpu/linalg_batch_families batched_qr f64 4 1024x8x8 1.343 ± 0.008 - 1.440 ± 0.071 1.308 ± 0.015 1.163 ± 0.129 - -
cpu/linalg_batch_families batched_qr f64 4 1x128x128 0.688 ± 0.011 - 0.811 ± 0.163 0.379 ± 0.006 0.667 ± 0.052 - -
cpu/linalg_batch_families batched_qr f64 4 1x2x2 0.002 ± 0.000 - 0.026 ± 0.007 0.005 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 4 1x32x32 0.018 ± 0.000 - 0.064 ± 0.034 0.025 ± 0.000 0.036 ± 0.014 - -
cpu/linalg_batch_families batched_qr f64 4 1x4x4 0.003 ± 0.001 - 0.029 ± 0.007 0.006 ± 0.000 0.010 ± 0.000 - -
cpu/linalg_batch_families batched_qr f64 4 1x64x24 0.028 ± 0.001 - 0.051 ± 0.018 0.030 ± 0.001 0.049 ± 0.024 - -
cpu/linalg_batch_families batched_qr f64 4 1x8x8 0.007 ± 0.000 - 0.026 ± 0.005 0.006 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 4 3x2x2 0.003 ± 0.000 - 0.028 ± 0.007 0.005 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 4 3x4x4 0.004 ± 0.000 - 0.034 ± 0.007 0.006 ± 0.000 0.012 ± 0.000 - -
cpu/linalg_batch_families batched_qr f64 4 3x8x8 0.006 ± 0.000 - 0.028 ± 0.004 0.009 ± 0.000 0.017 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 4 4x2x2 0.003 ± 0.000 - 0.027 ± 0.006 0.006 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 4 4x4x4 0.004 ± 0.000 - 0.026 ± 0.003 0.007 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 4 4x8x8 0.007 ± 0.000 - 0.032 ± 0.003 0.010 ± 0.000 0.038 ± 0.020 - -
cpu/linalg_batch_families batched_qr f64 4 8x128x128 5.930 ± 0.517 - 4.900 ± 0.879 2.822 ± 0.010 3.497 ± 0.409 - -
cpu/linalg_batch_families batched_qr f64 4 8x2x2 0.004 ± 0.000 - 0.025 ± 0.004 0.006 ± 0.000 0.012 ± 0.001 - -
cpu/linalg_batch_families batched_qr f64 4 8x32x32 0.129 ± 0.001 - 0.156 ± 0.008 0.161 ± 0.001 0.134 ± 0.003 - -
cpu/linalg_batch_families batched_qr f64 4 8x4x4 0.007 ± 0.000 - 0.038 ± 0.002 0.009 ± 0.000 0.016 ± 0.017 - -
cpu/linalg_batch_families batched_qr f64 4 8x8x8 0.012 ± 0.000 - 0.042 ± 0.013 0.015 ± 0.000 0.027 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 1 1024x2x2,rhs=1 0.080 ± 0.003 - 0.083 ± 0.004 0.083 ± 0.001 0.256 ± 0.027 - -
cpu/linalg_batch_families batched_solve f64 1 1024x4x4,rhs=1 0.134 ± 0.001 - 0.131 ± 0.009 0.119 ± 0.001 0.361 ± 0.005 - -
cpu/linalg_batch_families batched_solve f64 1 1024x8x8,rhs=1 0.427 ± 0.006 - 0.470 ± 0.018 0.429 ± 0.004 0.772 ± 0.012 - -
cpu/linalg_batch_families batched_solve f64 1 1x128x128,rhs=1 0.104 ± 0.001 - 0.144 ± 0.006 0.140 ± 0.001 0.142 ± 0.005 - -
cpu/linalg_batch_families batched_solve f64 1 1x2x2,rhs=1 0.002 ± 0.000 - 0.043 ± 0.003 0.014 ± 0.000 0.009 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 1 1x32x32,rhs=1 0.010 ± 0.000 - 0.045 ± 0.030 0.022 ± 0.000 0.023 ± 0.019 - -
cpu/linalg_batch_families batched_solve f64 1 1x4x4,rhs=1 0.002 ± 0.000 - 0.028 ± 0.001 0.014 ± 0.000 0.009 ± 0.000 - -
cpu/linalg_batch_families batched_solve f64 1 1x8x8,rhs=1 0.004 ± 0.000 - 0.029 ± 0.001 0.014 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 1 3x2x2,rhs=1 0.002 ± 0.000 - 0.028 ± 0.001 0.014 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 1 3x4x4,rhs=1 0.002 ± 0.000 - 0.029 ± 0.001 0.014 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 1 3x8x8,rhs=1 0.006 ± 0.000 - 0.029 ± 0.000 0.016 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 1 4x2x2,rhs=1 0.002 ± 0.000 - 0.028 ± 0.001 0.014 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 1 4x4x4,rhs=1 0.002 ± 0.000 - 0.029 ± 0.001 0.014 ± 0.000 0.011 ± 0.011 - -
cpu/linalg_batch_families batched_solve f64 1 4x8x8,rhs=1 0.003 ± 0.000 - 0.030 ± 0.002 0.016 ± 0.000 0.014 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 1 8x128x128,rhs=1 0.835 ± 0.004 - 0.904 ± 0.009 1.053 ± 0.008 0.954 ± 0.009 - -
cpu/linalg_batch_families batched_solve f64 1 8x2x2,rhs=1 0.002 ± 0.000 - 0.028 ± 0.001 0.014 ± 0.000 0.012 ± 0.013 - -
cpu/linalg_batch_families batched_solve f64 1 8x32x32,rhs=1 0.065 ± 0.000 - 0.099 ± 0.009 0.074 ± 0.000 0.088 ± 0.030 - -
cpu/linalg_batch_families batched_solve f64 1 8x4x4,rhs=1 0.003 ± 0.000 - 0.029 ± 0.001 0.015 ± 0.000 0.013 ± 0.015 - -
cpu/linalg_batch_families batched_solve f64 1 8x8x8,rhs=1 0.005 ± 0.000 - 0.032 ± 0.001 0.017 ± 0.000 0.017 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 1024x2x2,rhs=1 0.079 ± 0.001 - 0.080 ± 0.011 0.066 ± 0.000 0.260 ± 0.017 - -
cpu/linalg_batch_families batched_solve f64 4 1024x4x4,rhs=1 0.138 ± 0.002 - 0.121 ± 0.012 0.091 ± 0.000 0.368 ± 0.044 - -
cpu/linalg_batch_families batched_solve f64 4 1024x8x8,rhs=1 0.428 ± 0.004 - 0.469 ± 0.034 0.260 ± 0.002 1.018 ± 0.109 - -
cpu/linalg_batch_families batched_solve f64 4 1x128x128,rhs=1 0.104 ± 0.000 - 0.138 ± 0.011 0.140 ± 0.001 0.180 ± 0.048 - -
cpu/linalg_batch_families batched_solve f64 4 1x2x2,rhs=1 0.002 ± 0.000 - 0.026 ± 0.012 0.014 ± 0.001 0.009 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 1x32x32,rhs=1 0.010 ± 0.000 - 0.030 ± 0.004 0.022 ± 0.000 0.018 ± 0.003 - -
cpu/linalg_batch_families batched_solve f64 4 1x4x4,rhs=1 0.002 ± 0.000 - 0.028 ± 0.007 0.014 ± 0.000 0.009 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 1x8x8,rhs=1 0.002 ± 0.000 - 0.026 ± 0.009 0.014 ± 0.000 0.009 ± 0.000 - -
cpu/linalg_batch_families batched_solve f64 4 3x2x2,rhs=1 0.002 ± 0.000 - 0.029 ± 0.003 0.014 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 3x4x4,rhs=1 0.002 ± 0.000 - 0.029 ± 0.006 0.014 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 3x8x8,rhs=1 0.003 ± 0.000 - 0.024 ± 0.004 0.016 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 4x2x2,rhs=1 0.002 ± 0.000 - 0.025 ± 0.008 0.014 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 4x4x4,rhs=1 0.002 ± 0.000 - 0.025 ± 0.026 0.014 ± 0.000 0.011 ± 0.000 - -
cpu/linalg_batch_families batched_solve f64 4 4x8x8,rhs=1 0.003 ± 0.000 - 0.024 ± 0.009 0.016 ± 0.000 0.014 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 8x128x128,rhs=1 0.835 ± 0.004 - 0.918 ± 0.005 0.317 ± 0.004 0.721 ± 0.170 - -
cpu/linalg_batch_families batched_solve f64 4 8x2x2,rhs=1 0.002 ± 0.001 - 0.023 ± 0.005 0.015 ± 0.000 0.011 ± 0.001 - -
cpu/linalg_batch_families batched_solve f64 4 8x32x32,rhs=1 0.064 ± 0.000 - 0.091 ± 0.009 0.038 ± 0.000 0.089 ± 0.008 - -
cpu/linalg_batch_families batched_solve f64 4 8x4x4,rhs=1 0.003 ± 0.000 - 0.022 ± 0.004 0.015 ± 0.000 0.020 ± 0.013 - -
cpu/linalg_batch_families batched_solve f64 4 8x8x8,rhs=1 0.005 ± 0.000 - 0.026 ± 0.009 0.017 ± 0.000 0.017 ± 0.000 - -
cpu/linalg_batch_families batched_svd c64 1 1024x2x2 1.877 ± 0.006 - 1.892 ± 0.084 1.549 ± 0.008 2.053 ± 0.013 - -
cpu/linalg_batch_families batched_svd c64 1 1024x4x4 6.205 ± 0.030 - 6.299 ± 0.044 5.524 ± 0.025 5.448 ± 0.054 - -
cpu/linalg_batch_families batched_svd c64 1 1024x8x8 18.997 ± 0.101 - 18.980 ± 0.083 17.339 ± 0.043 15.987 ± 0.068 - -
cpu/linalg_batch_families batched_svd c64 1 1x128x128 5.382 ± 0.030 - 5.454 ± 0.025 6.244 ± 0.039 4.244 ± 0.037 - -
cpu/linalg_batch_families batched_svd c64 1 1x2x2 0.004 ± 0.000 - 0.036 ± 0.005 0.008 ± 0.000 0.014 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 1 1x32x32 0.202 ± 0.003 - 0.259 ± 0.019 0.229 ± 0.003 0.213 ± 0.006 - -
cpu/linalg_batch_families batched_svd c64 1 1x4x4 0.009 ± 0.000 - 0.041 ± 0.002 0.012 ± 0.000 0.017 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 1 1x64x24 0.186 ± 0.004 - 0.229 ± 0.009 0.207 ± 0.002 0.203 ± 0.002 - -
cpu/linalg_batch_families batched_svd c64 1 1x8x8 0.042 ± 0.000 - 0.059 ± 0.005 0.024 ± 0.000 0.029 ± 0.000 - -
cpu/linalg_batch_families batched_svd c64 1 3x2x2 0.008 ± 0.000 - 0.039 ± 0.002 0.011 ± 0.000 0.018 ± 0.008 - -
cpu/linalg_batch_families batched_svd c64 1 3x4x4 0.020 ± 0.000 - 0.041 ± 0.003 0.023 ± 0.000 0.028 ± 0.002 - -
cpu/linalg_batch_families batched_svd c64 1 3x8x8 0.057 ± 0.000 - 0.093 ± 0.005 0.058 ± 0.000 0.060 ± 0.002 - -
cpu/linalg_batch_families batched_svd c64 1 4x2x2 0.010 ± 0.000 - 0.040 ± 0.002 0.013 ± 0.000 0.040 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 1 4x4x4 0.026 ± 0.000 - 0.064 ± 0.006 0.028 ± 0.000 0.033 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 1 4x8x8 0.077 ± 0.000 - 0.113 ± 0.007 0.076 ± 0.000 0.077 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 1 8x128x128 42.818 ± 0.087 - 42.997 ± 0.123 49.644 ± 0.089 33.557 ± 0.157 - -
cpu/linalg_batch_families batched_svd c64 1 8x2x2 0.017 ± 0.000 - 0.047 ± 0.001 0.019 ± 0.000 0.028 ± 0.000 - -
cpu/linalg_batch_families batched_svd c64 1 8x32x32 1.604 ± 0.010 - 1.688 ± 0.040 1.774 ± 0.005 1.581 ± 0.006 - -
cpu/linalg_batch_families batched_svd c64 1 8x4x4 0.050 ± 0.000 - 0.089 ± 0.002 0.050 ± 0.000 0.054 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 1 8x8x8 0.150 ± 0.000 - 0.189 ± 0.004 0.142 ± 0.000 0.155 ± 0.015 - -
cpu/linalg_batch_families batched_svd c64 4 1024x2x2 2.600 ± 0.008 - 2.619 ± 0.018 1.502 ± 0.006 2.077 ± 0.037 - -
cpu/linalg_batch_families batched_svd c64 4 1024x4x4 6.434 ± 2.276 - 6.924 ± 0.434 5.446 ± 0.012 2.155 ± 0.459 - -
cpu/linalg_batch_families batched_svd c64 4 1024x8x8 18.831 ± 0.032 - 18.943 ± 0.819 17.272 ± 0.032 8.178 ± 0.191 - -
cpu/linalg_batch_families batched_svd c64 4 1x128x128 3.701 ± 0.015 - 4.588 ± 0.937 3.601 ± 0.024 3.896 ± 0.232 - -
cpu/linalg_batch_families batched_svd c64 4 1x2x2 0.006 ± 0.000 - 0.047 ± 0.013 0.008 ± 0.000 0.014 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 1x32x32 0.260 ± 0.008 - 0.342 ± 0.328 0.236 ± 0.003 0.233 ± 0.042 - -
cpu/linalg_batch_families batched_svd c64 4 1x4x4 0.012 ± 0.001 - 0.053 ± 0.013 0.012 ± 0.000 0.017 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 1x64x24 0.184 ± 0.001 - 0.336 ± 0.084 0.206 ± 0.003 0.196 ± 0.003 - -
cpu/linalg_batch_families batched_svd c64 4 1x8x8 0.021 ± 0.011 - 0.082 ± 0.031 0.024 ± 0.000 0.029 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 3x2x2 0.011 ± 0.000 - 0.046 ± 0.011 0.011 ± 0.000 0.018 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 3x4x4 0.028 ± 0.000 - 0.065 ± 0.008 0.023 ± 0.000 0.028 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 3x8x8 0.057 ± 0.000 - 0.098 ± 0.014 0.058 ± 0.000 0.060 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 4x2x2 0.014 ± 0.000 - 0.050 ± 0.008 0.013 ± 0.000 0.020 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 4x4x4 0.036 ± 0.000 - 0.072 ± 0.012 0.028 ± 0.000 0.034 ± 0.033 - -
cpu/linalg_batch_families batched_svd c64 4 4x8x8 0.077 ± 0.000 - 0.125 ± 0.037 0.076 ± 0.000 0.076 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 8x128x128 25.456 ± 4.828 - 33.102 ± 2.081 28.307 ± 0.041 18.198 ± 3.072 - -
cpu/linalg_batch_families batched_svd c64 4 8x2x2 0.024 ± 0.000 - 0.061 ± 0.008 0.019 ± 0.000 0.028 ± 0.000 - -
cpu/linalg_batch_families batched_svd c64 4 8x32x32 2.055 ± 0.004 - 2.294 ± 0.082 1.830 ± 0.007 0.439 ± 0.012 - -
cpu/linalg_batch_families batched_svd c64 4 8x4x4 0.069 ± 0.000 - 0.114 ± 0.015 0.050 ± 0.000 0.055 ± 0.001 - -
cpu/linalg_batch_families batched_svd c64 4 8x8x8 0.149 ± 0.001 - 0.200 ± 0.067 0.141 ± 0.001 0.140 ± 0.004 - -
cpu/linalg_batch_families batched_svd f64 1 1024x2x2 1.375 ± 0.009 - 1.415 ± 0.008 1.126 ± 0.006 1.228 ± 0.008 - -
cpu/linalg_batch_families batched_svd f64 1 1024x4x4 5.158 ± 0.015 - 5.244 ± 0.038 4.639 ± 0.021 4.184 ± 0.014 - -
cpu/linalg_batch_families batched_svd f64 1 1024x8x8 15.985 ± 0.092 - 16.008 ± 0.077 15.111 ± 0.042 13.143 ± 0.054 - -
cpu/linalg_batch_families batched_svd f64 1 1x128x128 2.528 ± 0.027 - 2.674 ± 0.106 2.677 ± 0.019 2.275 ± 0.028 - -
cpu/linalg_batch_families batched_svd f64 1 1x2x2 0.007 ± 0.005 - 0.049 ± 0.001 0.008 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 1 1x32x32 0.139 ± 0.002 - 0.181 ± 0.013 0.157 ± 0.001 0.166 ± 0.013 - -
cpu/linalg_batch_families batched_svd f64 1 1x4x4 0.014 ± 0.000 - 0.036 ± 0.015 0.011 ± 0.000 0.016 ± 0.018 - -
cpu/linalg_batch_families batched_svd f64 1 1x64x24 0.112 ± 0.001 - 0.149 ± 0.009 0.125 ± 0.001 0.147 ± 0.047 - -
cpu/linalg_batch_families batched_svd f64 1 1x8x8 0.035 ± 0.000 - 0.052 ± 0.005 0.021 ± 0.000 0.025 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 1 3x2x2 0.012 ± 0.000 - 0.039 ± 0.002 0.010 ± 0.000 0.016 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 1 3x4x4 0.034 ± 0.000 - 0.050 ± 0.002 0.020 ± 0.000 0.024 ± 0.024 - -
cpu/linalg_batch_families batched_svd f64 1 3x8x8 0.089 ± 0.045 - 0.083 ± 0.005 0.047 ± 0.001 0.049 ± 0.004 - -
cpu/linalg_batch_families batched_svd f64 1 4x2x2 0.015 ± 0.000 - 0.042 ± 0.005 0.011 ± 0.000 0.017 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 1 4x4x4 0.045 ± 0.000 - 0.056 ± 0.002 0.025 ± 0.000 0.028 ± 0.000 - -
cpu/linalg_batch_families batched_svd f64 1 4x8x8 0.060 ± 0.000 - 0.099 ± 0.013 0.061 ± 0.000 0.062 ± 0.000 - -
cpu/linalg_batch_families batched_svd f64 1 8x128x128 20.103 ± 0.156 - 20.198 ± 0.036 21.240 ± 0.056 17.467 ± 0.136 - -
cpu/linalg_batch_families batched_svd f64 1 8x2x2 0.026 ± 0.000 - 0.046 ± 0.001 0.016 ± 0.000 0.021 ± 0.000 - -
cpu/linalg_batch_families batched_svd f64 1 8x32x32 1.097 ± 0.002 - 1.157 ± 0.019 1.211 ± 0.006 1.178 ± 0.011 - -
cpu/linalg_batch_families batched_svd f64 1 8x4x4 0.085 ± 0.006 - 0.072 ± 0.020 0.043 ± 0.000 0.046 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 1 8x8x8 0.119 ± 0.000 - 0.169 ± 0.023 0.119 ± 0.000 0.127 ± 0.102 - -
cpu/linalg_batch_families batched_svd f64 4 1024x2x2 1.324 ± 0.007 - 1.426 ± 0.616 1.060 ± 0.008 1.289 ± 0.014 - -
cpu/linalg_batch_families batched_svd f64 4 1024x4x4 5.218 ± 1.682 - 5.776 ± 0.484 4.595 ± 0.010 1.312 ± 0.010 - -
cpu/linalg_batch_families batched_svd f64 4 1024x8x8 15.987 ± 0.062 - 16.674 ± 0.528 15.093 ± 0.018 6.618 ± 0.074 - -
cpu/linalg_batch_families batched_svd f64 4 1x128x128 2.775 ± 0.009 - 3.197 ± 3.254 2.164 ± 0.014 2.302 ± 0.381 - -
cpu/linalg_batch_families batched_svd f64 4 1x2x2 0.007 ± 0.000 - 0.037 ± 0.013 0.008 ± 0.000 0.017 ± 0.014 - -
cpu/linalg_batch_families batched_svd f64 4 1x32x32 0.146 ± 0.002 - 0.331 ± 0.214 0.164 ± 0.005 0.157 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 4 1x4x4 0.007 ± 0.000 - 0.037 ± 0.004 0.011 ± 0.000 0.016 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 4 1x64x24 0.115 ± 0.001 - 0.236 ± 0.079 0.127 ± 0.001 0.145 ± 0.021 - -
cpu/linalg_batch_families batched_svd f64 4 1x8x8 0.035 ± 0.000 - 0.053 ± 0.013 0.021 ± 0.000 0.025 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 4 3x2x2 0.006 ± 0.000 - 0.042 ± 0.011 0.010 ± 0.000 0.015 ± 0.000 - -
cpu/linalg_batch_families batched_svd f64 4 3x4x4 0.018 ± 0.007 - 0.046 ± 0.003 0.020 ± 0.000 0.024 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 4 3x8x8 0.044 ± 0.000 - 0.076 ± 0.022 0.048 ± 0.000 0.049 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 4 4x2x2 0.008 ± 0.000 - 0.039 ± 0.006 0.011 ± 0.000 0.017 ± 0.010 - -
cpu/linalg_batch_families batched_svd f64 4 4x4x4 0.022 ± 0.000 - 0.050 ± 0.002 0.025 ± 0.000 0.057 ± 0.031 - -
cpu/linalg_batch_families batched_svd f64 4 4x8x8 0.059 ± 0.000 - 0.098 ± 0.010 0.062 ± 0.000 0.062 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 4 8x128x128 16.139 ± 3.643 - 19.870 ± 0.852 16.849 ± 0.035 10.133 ± 0.296 - -
cpu/linalg_batch_families batched_svd f64 4 8x2x2 0.013 ± 0.000 - 0.044 ± 0.009 0.015 ± 0.000 0.021 ± 0.001 - -
cpu/linalg_batch_families batched_svd f64 4 8x32x32 1.582 ± 0.005 - 1.615 ± 0.085 1.267 ± 0.003 0.476 ± 0.007 - -
cpu/linalg_batch_families batched_svd f64 4 8x4x4 0.042 ± 0.000 - 0.070 ± 0.018 0.043 ± 0.000 0.046 ± 0.003 - -
cpu/linalg_batch_families batched_svd f64 4 8x8x8 0.119 ± 0.001 - 0.161 ± 0.010 0.119 ± 0.001 0.111 ± 0.005 - -
cpu/linalg_batch_families batched_svdvals f64 1 1024x2x2 0.360 ± 0.010 - unsupported 0.312 ± 0.005 0.647 ± 0.010 - -
cpu/linalg_batch_families batched_svdvals f64 1 1024x4x4 2.187 ± 0.012 - unsupported 2.030 ± 0.012 2.611 ± 0.032 - -
cpu/linalg_batch_families batched_svdvals f64 1 1024x8x8 5.495 ± 0.023 - unsupported 5.426 ± 0.008 6.772 ± 0.025 - -
cpu/linalg_batch_families batched_svdvals f64 1 1x128x128 1.029 ± 0.016 - unsupported 1.175 ± 0.013 1.136 ± 0.003 - -
cpu/linalg_batch_families batched_svdvals f64 1 1x2x2 0.002 ± 0.001 - unsupported 0.006 ± 0.000 0.009 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 1 1x32x32 0.051 ± 0.000 - unsupported 0.058 ± 0.000 0.068 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 1 1x4x4 0.004 ± 0.000 - unsupported 0.008 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 1 1x64x24 0.042 ± 0.000 - unsupported 0.048 ± 0.001 0.057 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 1 1x8x8 0.007 ± 0.000 - unsupported 0.011 ± 0.000 0.014 ± 0.002 - -
cpu/linalg_batch_families batched_svdvals f64 1 3x2x2 0.003 ± 0.000 - unsupported 0.008 ± 0.000 0.010 ± 0.009 - -
cpu/linalg_batch_families batched_svdvals f64 1 3x4x4 0.008 ± 0.000 - unsupported 0.012 ± 0.000 0.015 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 1 3x8x8 0.017 ± 0.000 - unsupported 0.022 ± 0.000 0.027 ± 0.026 - -
cpu/linalg_batch_families batched_svdvals f64 1 4x2x2 0.003 ± 0.000 - unsupported 0.008 ± 0.000 0.020 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 1 4x4x4 0.010 ± 0.000 - unsupported 0.014 ± 0.000 0.018 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 1 4x8x8 0.023 ± 0.000 - unsupported 0.027 ± 0.000 0.034 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 1 8x128x128 8.182 ± 0.013 - unsupported 9.255 ± 0.017 8.955 ± 0.025 - -
cpu/linalg_batch_families batched_svdvals f64 1 8x2x2 0.005 ± 0.000 - unsupported 0.009 ± 0.000 0.014 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 1 8x32x32 0.403 ± 0.003 - unsupported 0.427 ± 0.003 0.492 ± 0.003 - -
cpu/linalg_batch_families batched_svdvals f64 1 8x4x4 0.018 ± 0.000 - unsupported 0.022 ± 0.000 0.028 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 1 8x8x8 0.043 ± 0.001 - unsupported 0.048 ± 0.000 0.060 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 4 1024x2x2 0.617 ± 0.011 - unsupported 0.306 ± 0.006 0.638 ± 0.003 - -
cpu/linalg_batch_families batched_svdvals f64 4 1024x4x4 3.109 ± 0.003 - unsupported 2.015 ± 0.003 1.011 ± 0.342 - -
cpu/linalg_batch_families batched_svdvals f64 4 1024x8x8 7.520 ± 0.016 - unsupported 5.451 ± 0.012 3.427 ± 1.113 - -
cpu/linalg_batch_families batched_svdvals f64 4 1x128x128 1.022 ± 0.015 - unsupported 1.156 ± 0.012 1.209 ± 0.020 - -
cpu/linalg_batch_families batched_svdvals f64 4 1x2x2 0.003 ± 0.000 - unsupported 0.007 ± 0.000 0.009 ± 0.009 - -
cpu/linalg_batch_families batched_svdvals f64 4 1x32x32 0.051 ± 0.000 - unsupported 0.059 ± 0.000 0.068 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 4 1x4x4 0.005 ± 0.000 - unsupported 0.008 ± 0.000 0.010 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 4 1x64x24 0.042 ± 0.001 - unsupported 0.049 ± 0.000 0.058 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 4 1x8x8 0.009 ± 0.000 - unsupported 0.011 ± 0.000 0.014 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 4 3x2x2 0.004 ± 0.000 - unsupported 0.008 ± 0.000 0.010 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 4 3x4x4 0.011 ± 0.000 - unsupported 0.012 ± 0.000 0.015 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 4 3x8x8 0.023 ± 0.000 - unsupported 0.022 ± 0.000 0.027 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 4 4x2x2 0.005 ± 0.000 - unsupported 0.008 ± 0.000 0.010 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 4 4x4x4 0.014 ± 0.000 - unsupported 0.014 ± 0.000 0.018 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 4 4x8x8 0.031 ± 0.000 - unsupported 0.028 ± 0.000 0.034 ± 0.000 - -
cpu/linalg_batch_families batched_svdvals f64 4 8x128x128 8.126 ± 0.061 - unsupported 8.962 ± 0.013 5.287 ± 0.144 - -
cpu/linalg_batch_families batched_svdvals f64 4 8x2x2 0.007 ± 0.000 - unsupported 0.009 ± 0.000 0.013 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 4 8x32x32 0.402 ± 0.003 - unsupported 0.428 ± 0.003 0.156 ± 0.065 - -
cpu/linalg_batch_families batched_svdvals f64 4 8x4x4 0.026 ± 0.000 - unsupported 0.022 ± 0.000 0.028 ± 0.001 - -
cpu/linalg_batch_families batched_svdvals f64 4 8x8x8 0.060 ± 0.000 - unsupported 0.048 ± 0.000 0.060 ± 0.000 - -
cpu/linalg_batched batched_lu_factor f64 1 1024x16x16,rhs=1 1.007 ± 0.021 - unsupported 1.127 ± 0.033 2.556 ± 0.147 2.086 ± 0.020 -
cpu/linalg_batched batched_lu_factor f64 1 1024x2x2,rhs=1 0.032 ± 0.002 - unsupported 0.049 ± 0.001 0.092 ± 0.006 0.103 ± 0.001 -
cpu/linalg_batched batched_lu_factor f64 1 1024x4x4,rhs=1 0.052 ± 0.000 - unsupported 0.074 ± 0.001 0.182 ± 0.066 0.178 ± 0.002 -
cpu/linalg_batched batched_lu_factor f64 1 1024x8x8,rhs=1 0.223 ± 0.006 - unsupported 0.249 ± 0.002 0.468 ± 0.030 0.606 ± 0.031 -
cpu/linalg_batched batched_lu_factor f64 4 1024x16x16,rhs=1 1.002 ± 0.040 - unsupported 0.291 ± 0.004 0.893 ± 0.251 2.066 ± 0.597 -
cpu/linalg_batched batched_lu_factor f64 4 1024x2x2,rhs=1 0.033 ± 0.001 - unsupported 0.031 ± 0.001 0.098 ± 0.002 0.109 ± 0.007 -
cpu/linalg_batched batched_lu_factor f64 4 1024x4x4,rhs=1 0.052 ± 0.000 - unsupported 0.046 ± 0.001 0.175 ± 0.003 0.189 ± 0.007 -
cpu/linalg_batched batched_lu_factor f64 4 1024x8x8,rhs=1 0.228 ± 0.001 - unsupported 0.087 ± 0.001 0.362 ± 0.084 0.608 ± 0.033 -
cpu/linalg_batched batched_lu_solve f64 1 1024x16x16,rhs=1 0.325 ± 0.007 - unsupported 0.396 ± 0.003 0.773 ± 0.010 0.428 ± 0.003 -
cpu/linalg_batched batched_lu_solve f64 1 1024x2x2,rhs=1 0.031 ± 0.000 - unsupported 0.037 ± 0.000 0.173 ± 0.022 0.077 ± 0.002 -
cpu/linalg_batched batched_lu_solve f64 1 1024x4x4,rhs=1 0.065 ± 0.000 - unsupported 0.047 ± 0.000 0.213 ± 0.004 0.124 ± 0.002 -
cpu/linalg_batched batched_lu_solve f64 1 1024x8x8,rhs=1 0.208 ± 0.001 - unsupported 0.179 ± 0.001 0.352 ± 0.005 0.212 ± 0.004 -
cpu/linalg_batched batched_lu_solve f64 4 1024x16x16,rhs=1 0.321 ± 0.004 - unsupported 0.400 ± 0.004 0.685 ± 0.041 0.428 ± 0.005 -
cpu/linalg_batched batched_lu_solve f64 4 1024x2x2,rhs=1 0.031 ± 0.000 - unsupported 0.037 ± 0.000 0.170 ± 0.004 0.078 ± 0.001 -
cpu/linalg_batched batched_lu_solve f64 4 1024x4x4,rhs=1 0.064 ± 0.000 - unsupported 0.048 ± 0.000 0.225 ± 0.008 0.125 ± 0.001 -
cpu/linalg_batched batched_lu_solve f64 4 1024x8x8,rhs=1 0.208 ± 0.001 - unsupported 0.178 ± 0.001 0.357 ± 0.043 0.212 ± 0.001 -
cpu/linalg_batched batched_triangular_solve f64 1 1024x16x16,rhs=1 0.205 ± 0.001 - 0.302 ± 0.008 0.206 ± 0.004 0.368 ± 0.004 0.263 ± 0.007 -
cpu/linalg_batched batched_triangular_solve f64 1 1024x2x2,rhs=1 0.075 ± 0.000 - 0.093 ± 0.064 0.066 ± 0.001 0.082 ± 0.001 0.068 ± 0.001 -
cpu/linalg_batched batched_triangular_solve f64 1 1024x4x4,rhs=1 0.091 ± 0.006 - 0.118 ± 0.003 0.081 ± 0.001 0.102 ± 0.001 0.085 ± 0.002 -
cpu/linalg_batched batched_triangular_solve f64 1 1024x8x8,rhs=1 0.123 ± 0.000 - 0.168 ± 0.002 0.120 ± 0.001 0.172 ± 0.009 0.142 ± 0.005 -
cpu/linalg_batched batched_triangular_solve f64 4 1024x16x16,rhs=1 0.201 ± 0.004 - 0.378 ± 0.041 0.207 ± 0.002 0.317 ± 0.150 0.271 ± 0.003 -
cpu/linalg_batched batched_triangular_solve f64 4 1024x2x2,rhs=1 0.076 ± 0.001 - 0.100 ± 0.011 0.065 ± 0.001 0.083 ± 0.000 0.064 ± 0.001 -
cpu/linalg_batched batched_triangular_solve f64 4 1024x4x4,rhs=1 0.090 ± 0.000 - 0.119 ± 0.011 0.081 ± 0.001 0.108 ± 0.001 0.089 ± 0.002 -
cpu/linalg_batched batched_triangular_solve f64 4 1024x8x8,rhs=1 0.123 ± 0.000 - 0.192 ± 0.008 0.121 ± 0.001 0.212 ± 0.139 0.144 ± 0.003 -
cpu/linalg_uncovered cholesky f64 1 1536x1536 52.479 ± 1.004 - 53.057 ± 0.837 78.937 ± 0.194 71.830 ± 0.195 44.238 ± 10.434 -
cpu/linalg_uncovered cholesky f64 4 1536x1536 14.076 ± 0.184 - 18.264 ± 3.934 20.532 ± 0.045 23.681 ± 2.173 22.336 ± 5.581 -
cpu/linalg_uncovered det f64 1 1024x1024 27.160 ± 0.147 - 27.196 ± 0.204 27.712 ± 0.033 20.725 ± 0.063 17.110 ± 0.404 -
cpu/linalg_uncovered det f64 4 1024x1024 8.504 ± 0.663 - 8.181 ± 1.313 6.958 ± 0.077 7.963 ± 0.488 6.994 ± 1.001 -
cpu/linalg_uncovered eig f64 1 160x160 8.022 ± 0.016 - 8.094 ± 0.117 8.366 ± 0.013 7.575 ± 0.238 9.364 ± 0.042 -
cpu/linalg_uncovered eig f64 4 160x160 7.461 ± 3.744 - 10.920 ± 1.801 7.554 ± 0.020 7.616 ± 0.022 7.484 ± 0.098 -
cpu/linalg_uncovered eigvals f64 1 192x192 9.262 ± 0.030 - 9.291 ± 0.623 9.314 ± 0.021 9.420 ± 0.047 11.008 ± 0.043 -
cpu/linalg_uncovered eigvals f64 4 192x192 8.586 ± 0.028 - 10.324 ± 0.643 8.564 ± 0.017 9.605 ± 0.015 9.443 ± 0.050 -
cpu/linalg_uncovered eigvalsh f64 1 512x512 19.792 ± 0.138 - 19.839 ± 0.089 19.572 ± 0.051 32.839 ± 0.136 12.622 ± 0.107 -
cpu/linalg_uncovered eigvalsh f64 4 512x512 11.265 ± 0.028 - 13.606 ± 0.405 10.576 ± 0.043 24.253 ± 0.809 9.819 ± 0.436 -
cpu/linalg_uncovered inv f64 1 768x768 44.182 ± 0.182 - 44.618 ± 0.120 46.546 ± 0.061 33.074 ± 0.110 23.326 ± 0.094 -
cpu/linalg_uncovered inv f64 4 768x768 12.828 ± 0.163 - 14.710 ± 6.352 12.083 ± 0.052 11.415 ± 0.276 8.441 ± 0.047 -
cpu/linalg_uncovered lstsq f64 1 768x384,rhs=16 - 19.272 ± 0.159 19.174 ± 0.022 9.830 ± 0.034 38.120 ± 0.296 5.978 ± 0.037 -
cpu/linalg_uncovered lstsq f64 4 768x384,rhs=16 - 9.711 ± 0.147 9.237 ± 0.383 4.021 ± 0.029 27.010 ± 0.282 3.900 ± 0.217 -
cpu/linalg_uncovered lu f64 1 1024x1024 27.381 ± 0.237 - 28.535 ± 0.302 36.956 ± 0.802 33.278 ± 0.138 25.150 ± 11.659 -
cpu/linalg_uncovered lu f64 4 1024x1024 9.024 ± 0.211 - 10.818 ± 2.005 10.180 ± 0.306 11.767 ± 1.151 16.056 ± 6.645 -
cpu/linalg_uncovered norm_fro f64 1 2048x2048 0.700 ± 0.070 - 0.672 ± 0.109 0.980 ± 0.017 4.690 ± 0.059 3.359 ± 0.022 -
cpu/linalg_uncovered norm_fro f64 4 2048x2048 0.201 ± 0.078 - 0.203 ± 0.031 0.977 ± 0.042 2.537 ± 0.521 3.361 ± 0.017 -
cpu/linalg_uncovered pinv f64 1 512x256 21.217 ± 0.061 - 21.413 ± 0.244 21.872 ± 0.070 17.832 ± 0.039 16.551 ± 0.281 -
cpu/linalg_uncovered pinv f64 4 512x256 12.134 ± 0.176 - 12.872 ± 1.138 12.952 ± 0.037 14.381 ± 0.850 13.904 ± 0.313 -
cpu/linalg_uncovered pinv_with_rtol f64 1 512x256 21.235 ± 0.089 - 21.457 ± 0.061 21.879 ± 0.046 17.785 ± 0.048 16.551 ± 0.274 -
cpu/linalg_uncovered pinv_with_rtol f64 4 512x256 11.976 ± 0.483 - 14.444 ± 1.014 12.954 ± 0.037 14.242 ± 0.395 13.932 ± 0.569 -
cpu/linalg_uncovered slogdet f64 1 1024x1024 27.194 ± 0.273 - 27.107 ± 0.137 27.702 ± 0.046 20.806 ± 0.037 17.181 ± 0.348 -
cpu/linalg_uncovered slogdet f64 4 1024x1024 8.751 ± 0.079 - 8.300 ± 0.309 6.878 ± 0.013 7.926 ± 0.402 7.156 ± 0.631 -
cpu/linalg_uncovered svd_full f64 1 768x384 - 62.750 ± 0.382 63.297 ± 0.213 64.846 ± 0.055 52.654 ± 0.124 51.616 ± 0.560 -
cpu/linalg_uncovered svd_full f64 4 768x384 - 26.372 ± 3.860 29.802 ± 2.921 26.091 ± 0.063 36.273 ± 0.337 36.605 ± 1.246 -
cpu/linalg_uncovered triangular_solve f64 1 4096x4096,rhs=64 37.175 ± 0.185 - 75.268 ± 1.179 34.280 ± 0.127 120.383 ± 0.971 22.861 ± 0.348 -
cpu/linalg_uncovered triangular_solve f64 4 4096x4096,rhs=64 15.473 ± 0.729 - 35.407 ± 3.527 11.609 ± 0.077 43.749 ± 0.585 9.525 ± 0.365 -
cpu/output_reuse add_into f64 1 33554432 24.204 ± 0.111 - unsupported 23.974 ± 0.100 - 23.792 ± 0.157 67.798 ± 0.119
cpu/output_reuse add_into f64 4 33554432 23.962 ± 0.201 - unsupported 23.819 ± 0.093 - 23.826 ± 0.143 27.086 ± 0.096
cpu/output_reuse conj_into c64 1 16777216 17.598 ± 0.101 - unsupported 17.550 ± 0.324 - 17.524 ± 0.140 17.831 ± 0.124
cpu/output_reuse conj_into c64 4 16777216 17.594 ± 0.156 - unsupported 17.505 ± 0.132 - 17.555 ± 0.184 17.573 ± 0.214
cpu/output_reuse copy_read_into f64 1 33554432 14.730 ± 0.044 - unsupported 17.462 ± 0.115 - 14.277 ± 0.116 -
cpu/output_reuse copy_read_into f64 4 33554432 17.634 ± 0.077 - unsupported 17.754 ± 0.077 - 14.607 ± 0.108 -
cpu/output_reuse div_into f64 1 33554432 24.164 ± 0.204 - unsupported 23.949 ± 0.117 - 23.873 ± 0.109 69.091 ± 0.230
cpu/output_reuse div_into f64 4 33554432 23.489 ± 0.106 - unsupported 23.605 ± 0.077 - 23.924 ± 0.151 27.093 ± 0.153
cpu/output_reuse dot_general_read_into f64 1 1024x1024 58.396 ± 0.091 - unsupported 59.508 ± 0.072 - 33.517 ± 0.065 -
cpu/output_reuse dot_general_read_into f64 4 1024x1024 15.065 ± 0.055 - unsupported 16.377 ± 0.016 - 8.539 ± 0.022 -
cpu/output_reuse dot_general_read_into_accum f64 1 1024x1024 58.270 ± 0.098 - unsupported 59.361 ± 0.143 - 33.295 ± 0.047 -
cpu/output_reuse dot_general_read_into_accum f64 4 1024x1024 14.929 ± 0.031 - unsupported 16.292 ± 0.022 - 8.518 ± 0.025 -
cpu/output_reuse mul_into f64 1 33554432 24.149 ± 0.129 - unsupported 23.898 ± 0.093 - 23.779 ± 0.096 67.967 ± 0.202
cpu/output_reuse mul_into f64 4 33554432 23.602 ± 0.247 - unsupported 23.582 ± 0.097 - 23.909 ± 0.124 27.183 ± 0.279
cpu/output_reuse neg_into f64 1 33554432 17.763 ± 0.148 - unsupported 17.599 ± 0.271 - 17.538 ± 0.092 53.467 ± 0.179
cpu/output_reuse neg_into f64 4 33554432 17.599 ± 0.075 - unsupported 17.687 ± 0.122 - 17.573 ± 0.140 20.387 ± 0.174
cpu/output_reuse sub_into f64 1 33554432 24.181 ± 0.088 - unsupported 23.986 ± 0.080 - 23.798 ± 0.075 67.751 ± 0.185
cpu/output_reuse sub_into f64 4 33554432 23.813 ± 0.084 - unsupported 23.594 ± 0.079 - 23.800 ± 0.080 27.069 ± 0.078
cpu/structural_shape broadcast_in_dim f64 1 8192x1 -> 8192x4096 61.444 ± 1.417 - 63.670 ± 2.206 59.160 ± 1.257 59.318 ± 1.304 72.255 ± 0.537 -
cpu/structural_shape broadcast_in_dim f64 4 8192x1 -> 8192x4096 22.613 ± 0.430 - 22.491 ± 0.216 17.229 ± 1.171 19.002 ± 1.105 72.602 ± 0.499 -
cpu/structural_shape cast_f64_f32 f64->f32 1 33554432 35.499 ± 1.526 - 106.232 ± 1.763 32.728 ± 1.197 44.142 ± 0.676 36.281 ± 1.034 -
cpu/structural_shape cast_f64_f32 f64->f32 4 33554432 13.484 ± 0.287 - 46.015 ± 1.414 13.152 ± 0.174 15.037 ± 0.355 36.571 ± 0.868 -
cpu/structural_shape embed_diagonal f64 1 8192 -> 8192x8192 118.323 ± 0.988 - 117.711 ± 0.534 116.724 ± 0.550 119.668 ± 0.716 133.783 ± 0.571 -
cpu/structural_shape embed_diagonal f64 4 8192 -> 8192x8192 35.257 ± 1.363 - 36.237 ± 0.538 35.215 ± 1.071 36.442 ± 2.154 134.082 ± 0.799 -
cpu/structural_shape extract_diagonal f64 1 8388608x2x2 -> 8388608x2 30.588 ± 0.488 - 102.794 ± 2.411 39.355 ± 2.121 31.140 ± 0.677 - -
cpu/structural_shape extract_diagonal f64 4 8388608x2x2 -> 8388608x2 31.057 ± 0.230 - 63.283 ± 0.420 13.835 ± 0.214 13.450 ± 0.505 - -
cpu/structural_shape reshape f64 1 33554432 -> 8192x4096 71.845 ± 0.252 - 62.676 ± 0.498 61.393 ± 0.505 63.108 ± 0.735 78.479 ± 1.923 -
cpu/structural_shape reshape f64 4 33554432 -> 8192x4096 71.871 ± 0.807 - 21.805 ± 0.813 21.152 ± 0.619 24.199 ± 0.817 79.880 ± 2.041 -
cpu/structural_shape transpose f64 1 4096x4096 80.158 ± 0.737 - 79.626 ± 1.375 44.775 ± 0.196 49.131 ± 0.388 172.918 ± 1.283 97.569 ± 1.145
cpu/structural_shape transpose f64 4 4096x4096 21.998 ± 0.261 - 22.092 ± 0.546 44.139 ± 0.655 14.394 ± 0.454 174.191 ± 0.729 31.664 ± 0.528
cpu/structural_shape tril f64 1 4096x4096 33.341 ± 0.635 - 68.481 ± 3.139 38.967 ± 0.547 37.945 ± 0.565 40.690 ± 0.721 -
cpu/structural_shape tril f64 4 4096x4096 10.824 ± 0.249 - 27.119 ± 0.544 11.912 ± 0.136 12.588 ± 0.313 40.421 ± 0.757 -
cpu/structural_shape triu f64 1 4096x4096 32.838 ± 0.145 - 67.748 ± 1.580 38.629 ± 0.581 38.464 ± 0.598 40.632 ± 0.506 -
cpu/structural_shape triu f64 4 4096x4096 10.852 ± 0.168 - 26.317 ± 0.571 10.674 ± 0.105 12.637 ± 0.399 41.024 ± 0.564 -
cpu/view_metadata broadcast_in_dim_view f64 1 8192x1 -> 8192x4096 0.000 ± 0.000 - unsupported 0.001 ± 0.000 - - -
cpu/view_metadata broadcast_in_dim_view f64 4 8192x1 -> 8192x4096 0.000 ± 0.000 - unsupported 0.001 ± 0.000 - - -
cpu/view_metadata reshape_view f64 1 33554432 -> 8192x4096 0.000 ± 0.000 - unsupported 0.001 ± 0.000 - 0.000 ± 0.000 -
cpu/view_metadata reshape_view f64 4 33554432 -> 8192x4096 0.000 ± 0.000 - unsupported 0.001 ± 0.000 - 0.000 ± 0.000 -
cpu/view_metadata slice_view f64 1 4194304 -> 2096128 0.000 ± 0.000 - unsupported 0.001 ± 0.000 - 0.000 ± 0.000 -
cpu/view_metadata slice_view f64 4 4194304 -> 2096128 0.000 ± 0.000 - unsupported 0.001 ± 0.000 - 0.000 ± 0.000 -
cpu/view_metadata transpose_view f64 1 4096x4096 0.000 ± 0.000 - unsupported 0.001 ± 0.000 - 0.000 ± 0.000 -
cpu/view_metadata transpose_view f64 4 4096x4096 0.000 ± 0.000 - unsupported 0.001 ± 0.000 - 0.000 ± 0.000 -

Short-operation batches

Total batch duration and normalized ns/op are shown without rounding sub-microsecond calls to zero. Metadata views require no execution session.

Operation Threads Backend Operations/batch Median batch ms Median ns/op
broadcast_in_dim_view 1 PyTorch Python (ms) 16 0.022783 1423.94
broadcast_in_dim_view 1 tenferro-rs direct API (ms) 16 0.002555 159.69
broadcast_in_dim_view 4 PyTorch Python (ms) 16 0.022803 1425.19
broadcast_in_dim_view 4 tenferro-rs direct API (ms) 16 0.002705 169.06
reshape_view 1 Julia (Base/LinearAlgebra) (ms) 16 0.000111 6.94
reshape_view 1 PyTorch Python (ms) 16 0.021651 1353.19
reshape_view 1 tenferro-rs direct API (ms) 16 0.006031 376.94
reshape_view 4 Julia (Base/LinearAlgebra) (ms) 16 0.000160 10.00
reshape_view 4 PyTorch Python (ms) 16 0.021741 1358.81
reshape_view 4 tenferro-rs direct API (ms) 16 0.006332 395.75
slice_view 1 Julia (Base/LinearAlgebra) (ms) 16 0.000130 8.12
slice_view 1 PyTorch Python (ms) 16 0.022022 1376.38
slice_view 1 tenferro-rs direct API (ms) 16 0.004829 301.81
slice_view 4 Julia (Base/LinearAlgebra) (ms) 16 0.000341 21.31
slice_view 4 PyTorch Python (ms) 16 0.021891 1368.19
slice_view 4 tenferro-rs direct API (ms) 16 0.004448 278.00
transpose_view 1 Julia (Base/LinearAlgebra) (ms) 16 0.000110 6.88
transpose_view 1 PyTorch Python (ms) 16 0.020829 1301.81
transpose_view 1 tenferro-rs direct API (ms) 16 0.003907 244.19
transpose_view 4 Julia (Base/LinearAlgebra) (ms) 16 0.000110 6.88
transpose_view 4 PyTorch Python (ms) 16 0.020980 1311.25
transpose_view 4 tenferro-rs direct API (ms) 16 0.003637 227.31

Cross-Backend Spread Audit

Rows with a successful cell more than 10x faster than the slowest successful cell are flagged for operation-specific review. This cross-backend spread check is a warning, not a correctness verdict.

Physical Bound Audit

This independent check derives minimum logical bytes from dtype and shape for materializing public API operations, plus conservative operation FLOPs for reductions, Frobenius norms, matrix products, triangular solves, and recognized dense linalg families. Decorated shapes (->, rhs=, and +) are parsed explicitly. Operations whose touched region cannot be inferred conservatively from the reported shape are left unmodeled. It assumes at most 100 GB/s and 50 GFLOP/s per requested CPU thread, capped at 1000 GB/s and 3200 GFLOP/s. A cell more than 10x faster than the resulting lower bound is flagged. These deliberately generous ceilings are a sanity screen, not a performance gate.

No cell exceeded the conservative physical bound by more than 10x.